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Coupled Finite Element–Potts Model Simulations of Grain Growth in Copper Interconnects

Published online by Cambridge University Press:  31 January 2011

Bala Radhakrishnan
Affiliation:
[email protected], Oak Ridge National Laboratory, Computer Science and Mathematics, 1 Bethel Valley Road, oak Ridge, Tennessee, 37831-6164, United States, 865 241-3861
Gorti Sarma
Affiliation:
[email protected], Oak Ridge National Laboratory, Computer Science and Mathematics, Oak Ridge, Tennessee, United States
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Abstract

The paper addresses grain growth in copper interconnects in the presence of thermal expansion mismatch stresses. The evolution of grain structure and texture in copper in the simultaneous presence of two driving forces, curvature and elastic stored energy difference, is modeled by using a hybrid Potts model simulation approach. The elastic stored energy is calculated by using the commercial finite element code ABAQUS, where the effect of elastic anisotropy on the thermal mismatch stress and strain distribution within a polycrystalline grain structure is modeled through a user material (UMAT) interface. Parametric studies on the effect of trench width and the height of the overburden were carried out. The results show that the grain structure and texture evolution are significantly altered by the presence of elastic strain energy.

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

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References

1 Besser, P. R. et al., Journal of Electronic Materials 30, 320 (2001).Google Scholar
2 Mirpuri, K. and Szpunar, J., Materials Characterization 54, 1007 (2005.Google Scholar
3 Carreau, V., Maitrejean, S., Brechet, Y., Verdier, M., Bouchu, D. and Passemard, G. Microelectronic Engineering 85, 2133 (2008).Google Scholar
4 Jung, J. K., Hwang, N. M., Park, Y. J. and Joo, Y. C., J. Electronic Mater. 34, 559 (2005).Google Scholar
5 Lee, H. J., Han, H. N. and Lee, D. N., Journal of Electronic Materials 34, 1493 (2005).Google Scholar
6 Bloomfield, M. O., Bentz, D. N. and Cale, T. S., J. Electronic Mater. 37, 249 (2008).Google Scholar
7 Rollett, A. D. and Raabe, D., Computational Materials Science 21, 69 (2001).Google Scholar
8 Radhakrishnan, B. and Zacharia, T., Metall. Mater. Trans A 26, 2123 (1995).Google Scholar