Hostname: page-component-78c5997874-xbtfd Total loading time: 0 Render date: 2024-11-17T16:17:07.617Z Has data issue: false hasContentIssue false

Control of Polysilicon Emitter Bipolar Transistor Characteristics by Rapid Thermal or Furnace Anneal of the Polysilicon/Silicon Interface

Published online by Cambridge University Press:  28 February 2011

S. Bhattacharya
Affiliation:
Microelectronics Research Center, The University of Texas, Austin, TX 78712
M. Lobo
Affiliation:
Microelectronics Research Center, The University of Texas, Austin, TX 78712
L. Jung
Affiliation:
Microelectronics Research Center, The University of Texas, Austin, TX 78712
S. Banerjee
Affiliation:
Microelectronics Research Center, The University of Texas, Austin, TX 78712
R. Reuss
Affiliation:
Motorola Inc., Scottsdale, AZ 85258
S. Batra
Affiliation:
Micron Semiconductor, Boise, ID 83706
K. Park
Affiliation:
Cypress Semiconductor, San Jose, CA 94134
G. Hu
Affiliation:
Cypress Semiconductor, San Jose, CA 94134
Get access

Abstract

In this paper we report on the ability of rapid thermal annealing (1050C, 45s) and furnace annealing (900C, 30min) to partially break up the interfacial oxide in bipolar transistors with different oxide thicknesses at the polysilicon/silicon interface. We have obtained the different oxide thicknesses either by performing different ex situ cleans (RCA clean or RCA clean + HF dip) before Low Pressure Chemical Vapor Deposition (LPCVD) of polysilicon, or by using a cluster tool for polysilicon deposition with the ability to perform an in situ clean and then allowing the growth of different oxide thicknesses at the interface prior to polysilicon deposition. For the in situ cleaned devices, it is observed that after the interface anneal, the current gain increases with increasing oxide thicknesses, but with little penalty in terms of higher emitter resistance, Re. This indicates that by controllably increasing the interfacial oxide thickness and by subsequent annealing to partially break up the interfacial oxide, higher current gains can be obtained with little sacrifice in terms of higher Re.

Type
Research Article
Copyright
Copyright © Materials Research Society 1993

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Liu, T. M., Kim, Y. O., Lee, K.F., Jeon, D. Y., and Ourmazd, A., “The control of polysilicon/silicon interface processed by rapid thermal anneal,” IEEE BCTM, Sept. 1991, pp 263270.Google Scholar
2. Ajuria, S. A., Gan, C. H., Noel, J. A., Reif, L. R., “Quantitative correlations between the performance of polysilicon emitter transistors and the evolution of polysilicon/silicon interfacial oxides upon annealing,” IEEE Trans. Electron Devices, vol. ED–39, pp 14201427, 1992.Google Scholar
3. Filensky, W. and Beneking, H., “New technique for determination of static emitter and collector series resistances of bipolar transistors,” Electronics Letters, 17(14), pp 503504, 1981.Google Scholar
4. Ning, T. H. and Tang, D. D., “Method of determining emitter and base series resistance of bipolar trasistors,” IEEE Trans. Electron Devices, ED–31, pp 409412, 1984.Google Scholar