The combination of a-Si low leakage pixel TFTs with poly-Si TFTs in peripheral circuits provides an excellent method for reducing the number of external connections to large-area imaging arrays and displays. To integrate the fabrication of the peripheral poly-Si TFTs with the a-Si pixel TFTs, we have developed a three-step laser process which enables selective crystallization of PECVD a-Si:H. X-ray diffraction and transmission electron microscopy show that the polycrystalline grains formed with this three-step process are similar to those crystallized by a conventional one step laser crystallization of unhydrogenated amorphous silicon. The grain size increases with increasing laser energy density up to a peak value of a few Microns. The grain size decreases with further increases in laser energy density. The transistor field effect mobility is correlated with the grain size, increasing gradually with laser energy density until reaching its maximum value. Thereafter, the transistors suffer from leakage through the gate insulators. A dual dielectric gate insulator has been developed for these bottom-gate thin film transistors to provide the correct threshold voltages for both a-Si and poly-Si TFTs.