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Cobalt Silicidation on Sub 100nm Hole Patterned Vertical Diode Formed by Silicon Epitaxial Growth and Its Electrical Properties

Published online by Cambridge University Press:  01 February 2011

Min Yong Lee ,
K. B. Lee ,
H. S. Lee ,
S. J. Chae ,
I. K. Han ,
H. S. Kang  and
S. W. Park
Min Yong Lee
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of, 82-31-630-2124
K. B. Lee
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
H. S. Lee
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
S. J. Chae
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
I. K. Han
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
H. S. Kang
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
S. W. Park
Affiliation:
[email protected], Hynix Semiconductor Inc., R&D, San 136-1 Ami-ri Bubal-eub Icheon-si, Icheon, 467-701, Korea, Republic of
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Abstract

Self-aligned Cobalt silicide as ohmic contact layer on sub 100 nm hole patterned Si vertical diode formed by silicon epitaxial growth (SEG) is investigated and silicon epitaxial growth of higher than 4000 Å thickness and good crystalinity for PN diode has been successfully developed. Also, electrical isolation of 100 nm pitch size between diode and diode, and removal of unreacted Co/Ti/TiN layer have been realized by dip-out process without CMP simultaneously. Through the mechanism of void formation due to the variation of Si consumption rate during silicidation at limited hole pattern dimension, critical Co and Capping Ti thickness are investigated as various hole dimensions (80∼120 nm), and then with p+ type dopant species (49BF2, 11B). The ratio of Co thickness to hole dimension demonstrates void free cobalt silcidation on various pattern sizes of silicon epitaxial growth. Silicon epitaxial growing PN diodes including void free CoSi2 show excellent electrical performance, especially lower than 10 pA reverse off leakage current.

Keywords

Cophysical vapor deposition (PVD)defects
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1079: Symposium N – Materials and Processes for Advanced Interconnects for Microelectronics , 2008 , 1079-N08-06
Copyright
Copyright © Materials Research Society 2008

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References

REFERENCES

1. Kim, Y. C., Kim, J. C., Choy, J. H., Park, J. C., and Choi, H. M., Appl. Phys. Lett., 75, 9 (1999)Google Scholar
2. Kim, J. C., Kim, Y. C., Choy, J. H, J. Korean Ceramic Soc. 38 (10), 782–786 (2001)Google Scholar
3. Byun, J. S., Seon, J. M., Youn, K. S., Hwang, H. S., Park, J. W., and Kim, J. J. J. Electrochem. Soc., 143, 3 (1996)Google Scholar
4. Kim, J. C., Kim, Y. C., Kim, B. K., J. Korean Ceramic Soc. 38 (10) 871–875(2001)Google Scholar
5. Pey, K. L., Chua, H. N., and Siah, S. Y., Electrochemical and Solid-State Letters, 3 (9) 442–445 (2000)Google Scholar
6. Kim, N. S., Cha, H. S., Sung, N. K. and Ryu, H.H J. Vac. Sci. Tech. 20(4), 2002 Google Scholar
7. Ho, C. S.,a Pey, K. L.,b,z Tung, C. H.,c Zhang, B. C.,a Tee, K. C.,a Karunasiri, G.,d,e and Chuad, S. J. Electrochemical and Solid-State Letters, 7~11, H49–H51 (2004)Google Scholar
8. Chen, Y. M., Tu, G. C., J. Vac. Sci. Tech. 24(1) 2006 Google Scholar
9. Alberti, A., Fronterre, R., Via, F. La, Rimini, E. Materials Sceince and Engineering B 114-115 232–235 (2004)Google Scholar
10. Buschbaum, S., Fursenko, O., Bolze, D., Wolansky, D., Melnik, V., Nieß, J., Lerch, W., Microelectronic Engineering 76 (2004) 311–317 Google Scholar