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Amorphous Silicon Based TFT and MIS Nonvolatile Memories

Published online by Cambridge University Press:  01 February 2011

Yue Kuo
Affiliation:
[email protected], Texas A&M University, 235 J. E. Brwon Engineering Bldg., MS 3122, TAMU, College Station, TX, 77843-3122, United States, 979-845-9807, 979-458-8836
Helinda Nominanda
Affiliation:
[email protected], Texas A&M University, 235 J. E. Brown Engineering Bldg., MS 3122, College Station, TX, 77843-3122, United States
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Abstract

The amorphous silicon (a-Si:H) TFT and MIS capacitor, which include an a-Si:H layer embedded in the silicon nitride gate dielectric layer, have been prepared and characterized for memory functions. Large shifts of the threshold voltage and flat band voltage were detected in the current-voltage and capacitance-voltage hysteresis measurements. The embedded a-Si:H film functioned as a charge retention medium that stores and releases injected carriers. The devices memory capacity varied with the thickness of the embedded a-Si:H layer and the sweep voltage. These low-cost memory devices can be used in many low-temperature prepared circuits.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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References

1 Kuo, Y. in “Non-LCD Applications of a-Si:H TFTs,” Thin Film Transistors, Materials and Processes, Volume 1: Amorphous Silicon Thin Film Transistors, ed. Kuo, Y. (Kluwer, 2004) pp. 485503.Google Scholar
2 Kuo, Y. and Nominanda, H., Appl. Phys. Lett. 89, 173503 (2006).Google Scholar
3 Nominanda, H. and Kuo, Y. in Non-volatile Amorphous Silicon Thin Film Transistor Memories with the a-Si:H Embedded Gate Dielectric Structure, ed. Kuo, Y. (Electrochem. Soc. Trans., TFT Tech. 8, Vol. 13(8), Pennington, NJ, 2006, pp. 333339.Google Scholar
4 Burns, S. G., Shanks, H. R., Constant, A. P., Grubber, C., Schmidt, D., Landin, A., Thielen, C., Olympie, F., Schumacher, T., and Cobbs, J., Design and Fabrication of α-Si:H-Based EEPROM Cells, ed. Kuo, Y. (Electrom. Soc. Proc. PV 1994-1935 1994) pp. 370380.Google Scholar
5 Kuo, Y., J. Electrochem. Soc. 138, 637 (1991).Google Scholar
6 Kuo, Y. and Lee, S., Appl. Phys. Lett. 78, 1002 (2001).Google Scholar
7 Hillard, R. J., Heddleson, J. M., Zier, D. A., Rai-Choudhury, P., and Schroder, D. K., Diagnosis Techniques for Semiconductor Materials and Devices, Benton, J. L., Maracas, G. N., and Rai-Choudhury, P., Eds, Pennington, NJ: Electrochem. Soc., p. 261, 1992.Google Scholar
8 Nicollian, E. H and Brews, J. R., MOS (Metal Oxide Semiconductor), Physics and Technology, Ch. 5 & 10, New Jersey: Wiley-Interscience, 2003.Google Scholar
9 Sze, S. M., Physics Semiconductor Devices, p. 4. 98, New York: John Wiley & Sons, 1981.Google Scholar
10 Yang, K. J., King, T.-J., Hu, C., Levy, S., Al-Shareef, H. N., Solid-Sta. Elec. 47, 149 (2003).Google Scholar
11 Hiranaka, K., Yoshimura, T., and Yamaguchi, T., J. Appl. Phys. 62, 2129 (1987).Google Scholar
12 Harbison, J. P., Williams, A. J., and Lang, D.V., J. Appl. Phys. 55, 946 (1984).Google Scholar
13 Hiranaka, K. and Yamaguchi, T., Jpn. J. Appl. Phys. 29, 229 (1990).Google Scholar
14 Danesh, P. and Pantchev, B., Semicond. Sci. Technol. 15, 971 (2000).Google Scholar