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Tunneling Currents in Nanoscale high-κ MOS Structures

Published online by Cambridge University Press:  21 March 2011

Andrés Vercik*
Affiliation:
Basic Sciences Department ZAB/FZEA, University of São Paulo, Av. Duque de Caxias Norte 225, 13635-000, Pirassununga, SP, Brazil.
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Abstract

Further improvements of integrated circuits depend on the continuous downscaling of MOSFET´s, well beyond the limits for which direct tunneling currents are acceptable. These leakage currents affect both the stand-by power dissipation and the formation of the inversion layer ate the semiconductor surface, i.e., the channel formation. The most promising strategy to overcome this problem is the use of high-κ insulator in substitution of or as an additional layer on the traditional silicon dioxide. The aim of this work is using a recently developed theory to describe tunneling from inversion layers for high-κ insulators or stacks and analyze the effects of tunneling current on the thermal equilibrium in these cases.

Type
Research Article
Copyright
Copyright © Materials Research Society 2011

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References

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