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Threading Dislocation Densities in GaAs Grown on Reduced Area Si Substrates

Published online by Cambridge University Press:  15 February 2011

J. Knall
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA 94304
L.T. Romano
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA 94304
D.K. Biegelsen
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA 94304
R.D. Bringans
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA 94304
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Abstract

We have studied the possibilities of reducing the threading dislocation (TD) density in GaAs on Si using free side wall growth on patterned Si substrates and/or using a soft ZnSe interlayer in combination with post growth annealing procedures. TD densities were accurately determined using large area plan view TEM and were found to be unaffected by proximity to free side walls and by the ZnSe interlayer. Post growth heat treatments led to a factor of ∼2 reduction in TD density and to bunching of dislocations throughout the thickness of the film.

Type
Research Article
Copyright
Copyright © Materials Research Society 1993

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References

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