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Published online by Cambridge University Press: 01 February 2011
Silicon (Si) source and drain (S/D) regions have been successfully integrated in thin-body silicon-germanium-on-insulator (SGOI) n-FETs. The selectively grown Si S/D induces uniaxial tensile strain in the SiGe channel. Devices with gate length LG down to 50 nm were fabricated. The Si S/D gives rise to 40% higher saturation drive current IDsat for transistors fabricated on Si0.60Ge0.40-on-insulator substrates. For n-FETs fabricated on Si0.75Ge0.25-on-insulator substrates, a 27% IDsat enhancement was observed. Lattice mismatch between the silicon S/D region and the SiGe channel was exploited to induce lateral tensile strain and vertical compressive strain in the channel, leading to enhancement in electron mobility. Analyses of contributions from the tensile strain to mobility enhancement and performance improvement are discussed