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Strontium Bismuth Tantalate Based Ferroelectric Gate Field Effect Transistor with Yttrium Oxide as the Buffer Layer

Published online by Cambridge University Press:  10 February 2011

Myoung-Ho Lim
Affiliation:
Presently at Symetrix Corporation, Colorado Springs
T. S. Kalkur
Affiliation:
Microelectronics Research Laboratories, Department of Electrical and Computer Engineering, University of Colorado, Colorado Springs, CO 80933-7150.
Yong-Tae Kim
Affiliation:
Semiconductor Materials Laboratory, Korea Institute of Science and Technology, P.O. Box 131, Cheongyang, Seoul, Korea.
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Abstract

We report the first demonstration of an enhancement mode n-channel metal -ferroelectric-semiconductor field effect transistor (MFISFET) realized directly on silicon with yttrium oxide as the buffer layer. The capacitance-voltage (C-V) characteristics of Metal Ferroelectric Insulator Silicon (MFIS) structures show hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. The memory window in the C-V characteristics was 2V for an applied voltage of ± 10V. The memory window did not show significant change due to decrease in rate of change of sweep voltage and temperature. The transmission electron microscopy (TEM) analysis confirms the formation of an amorphous oxide layer between silicon and yttrium oxide buffer layer.

Type
Research Article
Copyright
Copyright © Materials Research Society 1998

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References

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