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Stressmigration studies on dual damascene Cu/oxide and Cu/low kinterconnects

Published online by Cambridge University Press:  17 March 2011

Won-Chong Baek
Affiliation:
Microelectronics Research Center, the University of Texas at Austin, Austin, TX 78712, USA
Paul. S. Ho
Affiliation:
Microelectronics Research Center, the University of Texas at Austin, Austin, TX 78712, USA
Jeong Gun Lee
Affiliation:
System IC R&D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725, South Korea
Sung Bo Hwang
Affiliation:
System IC R&D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725, South Korea
Kyeong-Keun Choi
Affiliation:
System IC R&D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725, South Korea
Jong Sun Maeng
Affiliation:
System IC R&D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725, South Korea
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Abstract

Stress-induced void formation (SIV) was studied in dual damascene Cu/oxideand Cu/low k interconnects over a temperature range of 140 ∼ 350 °C. Twomodes of stressmigration were observed depending on the baking temperatureand sample geometry. At lower temperatures (T < 290 °C), voids wereformed under the periphery of via connecting to narrow lines. This mode ofstressmigration showed a typical behavior of stressmigration with peakdamage at 240 °C, and an activation energy (Q) of 0.75 eV for Cu/oxideinterconnects. At a higher temperature range (T > 290 °C), voids werefound in via bottoms which were connected to wide lines. The rate of hightemperature stressmigration increased exponentially with temperature up to350 °C and did not show a peak at a certain temperature. The activationenergy was 1.0 eV for Cu/oxide, 0.86 eV for Cu/OSG, and ∼1.0 eV for Cu/FSGinterconnects. The dependence of stressmigration on linewidth, samplegeometry, and ILD material is presented in this paper.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

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