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Stress Induced During the Solid-phase Crystallization of Amorphous Silicon Deposited by LPCVD

Published online by Cambridge University Press:  15 February 2011

T. Mohammed-Brahim
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
K. Kis-Sion
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
D. Briand
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
M. Sarret
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
F. Lebihan
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
B. Fortin
Affiliation:
GMV Universitd Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France
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Abstract

The Solid Phase Crystallization (SPC) of amorphous silicon films deposited by Low Pressure Chemical Vapor phase Deposition (LPCVD) using pure silane at 550'C was studied by in-situ monitoring the film conductance. The saturation of the conductance at the end of the crystallization process is found transient. The conductance decreases slowly after the onset of the saturation. This degradation is also observed from other analyses such as ellipsometry spectra, optical transmission and Arrhenius plots of the conductivity between 250 and 570K. Hall effect measurements show that the degradation is due to a decrease of the free carrier concentration n and not to a decrease of the mobility. This indicates a constant barrier height at the grain boundaries. The decrease of n is then due to a defect creation in the grain. Hence, whatever the substrate used, an optimum crystallization time exists. It depends on the amorphous quality film which is determined by the deposition techniques and conditions and on the crystallization parameters.

Type
Research Article
Copyright
Copyright © Materials Research Society 1996

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