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Self-Aligned, Metal-Masked Dry Etch Processing of III-V Electronic and Photonic Devices

Published online by Cambridge University Press:  25 February 2011

S. J. Pearton
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
A. Katz
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
A. Feingold
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
F. Ren
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
T. R. Fullowan
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
J. R. Lothian
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
C. R. Abernathy
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ
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Abstract

Electron Cyclotron Resonance (ECR) plasma etching of a variety of III-V devices, including heterojunction bipolar transistors (HBTs), and lasers will be reviewed. In many of these devices, the metal contacts also perform as self-aligned, dry etch masks, so that mask erosion must be addressed. Sidewall smoothness is also an issue for most etched mesa lasers, and conditions for achieving the requisite smoothness will be discussed. The use of stencil masks for pattern transfer of large (∼100μm) features during cluster-tool, single wafer integrated processing raises the possibility of a completely in-situ fabrication technology without the need for lithography. The dry etching of a variety of ohmic and Schottky metallizations and also of dielectrics deposited in a low pressure, rapid thermal CVD system lays the foundation for integrated III-V device processing.

Type
Research Article
Copyright
Copyright © Materials Research Society 1992

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References

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