Hostname: page-component-586b7cd67f-2plfb Total loading time: 0 Render date: 2024-11-29T06:57:44.125Z Has data issue: false hasContentIssue false

Reliability Issues of a Crack-Resistant Passivation Layer Process for Sub-Micron Non-Volatile Memory Technology

Published online by Cambridge University Press:  21 February 2011

Mansour Moinpour
Affiliation:
Intel Corp., California Technology and Manufacturing Group, Santa Clara, CA
John Chu
Affiliation:
Intel Corp., California Technology and Manufacturing Group, Santa Clara, CA
Karen Lubic
Affiliation:
Intel Corp., California Technology and Manufacturing Group, Santa Clara, CA
Farhad Moghadam
Affiliation:
Intel Corp., California Technology and Manufacturing Group, Santa Clara, CA
Get access

Abstract

Chemically vapor deposited phosphosilicate glass (PSG) has been used extensively for final passivation on EPROM and other Non Volatile Memory (NVM) technologies. The maximum amount of phosphorous that can be added to the passivation oxide (post metallization) is constrained by the stability of the as-deposited, undensified film. Atmosphericpressure chemically vapor deposited films of various dopant levels ranging from pure PSG to various boron and phosphorous wt%BPSG films were studied with respect to their passivation properties. The film performance with respect to passivation crack resistance, step coverage, and impacts on metal cracks/voids was evaluated. It was found that the crack resistance was by far more sensitive to boron concentration than that of phosphorous in the undensified film. The crack resistance is shown to be dependent on the as-deposited film densities, moisture levels and amount of shrinkage after a 400° C alloy/anneal. Other important parameters such as stress levels, UV transparency and sodium gettering capabilities were investigated. Reliability data on packaged-device level testing (both ceramic and plastic units) are also presented.

Type
Research Article
Copyright
Copyright © Materials Research Society 1993

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Schlacter, M.M., Schlegal, E.S., Keen, R.S., Lathlean, R.A. and Schnable, G.L., IEEE Trans. Electron Devices ED–17, No. 12, pp. 10771084, 1969.Google Scholar
2. Paulson, W.M. and Kirk, R.W., Proc. Int. Reliab. Phys. Symp., Vol. 12, pp. 172179, 1974.Google Scholar
3. Kern, W. and Schnable, G.L., RCA Rev., Vol. 43, pp. 423437, 1982.Google Scholar
4. Wada, T., Sugimoto, M., and Ajiki, T., J. Electrochem. Soc., Vol. 136, No. 3, pp. 732735, 1989.CrossRefGoogle Scholar
5. Kern, W. and Smeltzer, R., Solid State Technology, Vol. 28, No. 6, pp. 171179, 1985.Google Scholar
6. Sinha, A.K., Levinstein, H.J., and Smith, T.E., J. Appl. Phys., Vol. 49, No. 4, pp. 24232426, 1978.Google Scholar
7. McInerney, E.J. and Flinn, P.A., Proc. Int. Reliab. Phys. Symp., Vol. 20, pp. 264267, 1982.Google Scholar
8. Paulson, W.M. and Lorigan, R.P., Proc. Int. Reliab. Phys. Symp., Vol. 14, pp. 4247, 1976.Google Scholar
9. Shirley, C.G. and Maston, S.C., Internal Intel Technical Memo, 1990.Google Scholar
10. Cox, J.N., Shergill, G., Rose, M., and Chu, J.K., Proceedings of the 1990 VMIC, pp. 419421, June, 1990).Google Scholar
11. Cox, J.N., Ren, J.Z., Horn, J.M. Van, Kwok, K.W., ECS Extended Abstracts, Vol. 92–2, No. 149, pp. 250251, May 1992.Google Scholar
12. Pliskin, W.A., J. Vac. Sci. Technol., Vol. 14, pp. 10641068, 1977.Google Scholar
13. Arai, E. and Terunuma, Y., J. Electrochem. Soc., Vol. 121, pp. 676681, 1974.CrossRefGoogle Scholar
14. Chen, M., Internal Intel Technical Memo, March, 1990.Google Scholar
15. Myers, J., Internal Intel Technical Memo, February, 1990.Google Scholar