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Read Back of Stored Data in Non Volatile Memory Devices by Scanning Capacitance Microscopy

Published online by Cambridge University Press:  20 March 2013

Rudra S. Dhar
Affiliation:
Department of Electrical & Computer Engineering, Waterloo Institute for Nanotechnology, University of Waterloo, 200 University Ave W., Waterloo, ON, N2L3G1, Canada
St.J. Dixon-Warren
Affiliation:
Chipworks, 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7, Canada
Mohamed A. Kawaliye
Affiliation:
Chipworks, 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7, Canada
Jeff Campbell
Affiliation:
Chipworks, 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7, Canada
Mike Green
Affiliation:
Chipworks, 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7, Canada
Dayan Ban
Affiliation:
Department of Electrical & Computer Engineering, Waterloo Institute for Nanotechnology, University of Waterloo, 200 University Ave W., Waterloo, ON, N2L3G1, Canada
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Abstract

This report outlines a methodology for reading back different electrical charges, from Non Volatile Memory (NVM) based Flash devices. The charge is stored in the floating gates (FGs) of the transistors. Reading back these charges in the form of logic levels of “1 bit (1b)” and “0 bit (0b)” without deleting the information from the device was the goal. Scanning Capacitance Microscopy (SCM) with ∼50-100 nm spatial resolution was used, to directly probe the charge on Floating Gate Transistor (FGT) channels. Transistor charge values (ON/OFF or “1b/0b”) are measured. Both the sample preparation and SCM probing methods are discussed. The application has been demonstrated with SanDisk based 64 MB NAND Flash memory device.

Type
Articles
Copyright
Copyright © Materials Research Society 2013

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References

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