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Patterning III-N Semiconductors by Low Energy Electron Enhanced Etching (LE4)
Published online by Cambridge University Press: 15 February 2011
Abstract
Fabricating device structures from the III-N wide ba-ndgap semiconductors requires anisotropoic dry etching processes that leave smooth surfaces with stoichiometric composition after transferring high-resolution patterns with vertical sidewalls. The purpose of this article is to describe results obtained by a new low-damage dry etching technique that provides an alternative to the standard ion-enhanced dry etching methods in meeting these demands for processing the HI-N materials.
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- Copyright © Materials Research Society 1999
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