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Optimization of AICu Wiring Delay in Advanced CMOS Technology

Published online by Cambridge University Press:  15 February 2011

A. K. Stamper ,
V. McGahay ,
M. Shapiro ,
L. A. Miller ,
X. Tian ,
A. Bryant  and
L. A. Serianni
A. K. Stamper
Affiliation:
IBM Microelectronics, Essex Junction, VT 05452
V. McGahay
Affiliation:
IBM Microelectronics, Hopewell Junction, NY 12533
M. Shapiro
Affiliation:
IBM Microelectronics, Hopewell Junction, NY 12533
L. A. Miller
Affiliation:
IBM Microelectronics, Essex Junction, VT 05452
X. Tian
Affiliation:
IBM Microelectronics, Essex Junction, VT 05452
A. Bryant
Affiliation:
IBM Microelectronics, Essex Junction, VT 05452
L. A. Serianni
Affiliation:
IBM Microelectronics, Essex Junction, VT 05452
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Abstract

Fluorinated high-density plasma and plasma-enhanced CVD SiO2 inter-metal dielectrics have been evaluated for 0.50- through 0.25- μm generation CMOS. Several integration issues are discussed, including the impact of fluorine-doped SiO2 on the yield, reliability, and RC delay of 0.7 - 1.8 μm pitch back-end-of-the-line AlCu/tungsten-stud wiring.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 443: Symposium H – Low-Dielectric Constant Materials II , 1996 , 183
Copyright
Copyright © Materials Research Society 1997

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References

1. Matsuda, T., Shapiro, M., and Nguyen, S., Proc. 1 st Int. Diel. VLSI Multilevel Int. Conf., Santa Clara, 1995, p22.Google Scholar
2. Shapiro, M., Nguyen, S., and Matsuda, T., Proc. 1st Int. Diel. VLSI Multilevel Int. Conf., Santa Clara, 1995, p 118.Google Scholar
3. Shannon, V. L. and Karim, M. Z., Thin Solid Films 270, 1995, p498.Google Scholar
4. Miller, L. A. and Stamper, A. K., Proc. VLSI Multilevel Interconnection Conference, Santa Clara, CA, June, 1995 p144.Google Scholar