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Nonvolatile Charge Storage Characteristics of a MOS Diode with Buried Silicon Nanocrystals and Interfacial Si Nano-pyramids

Published online by Cambridge University Press:  01 February 2011

Yu-Chung Lien
Affiliation:
[email protected], NTU, Optic-electronic, Taipei, Taiwan, Province of China
Yi-Hao Pai
Affiliation:
[email protected], NTU, Optic-electronic, Taipei, Taiwan, Province of China
Cheng-Tao Lin
Affiliation:
[email protected], NTU, Optic-electronic, Taipei, Taiwan, Province of China
Gong-Ru Lin
Affiliation:
[email protected], United States
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Abstract

The memory effect of MOS diodes made on Si substrate with Si nanocrystals (NC-Si) and interfacial Si nano-pyramids deposited by PECVD at different ICP powers is characterized. TEM analysis on the NC-Si reveals that the NC-Si average size are around 3.9±1.1 nm and 4.7±0.7 nmwhen grown at ICP power of 20 W and 30 W, respectively. The interfacial Si nano-pyramids can only be observed by growing at 30 W or larger. The density of NC-Si of 4.4 × 1018 and 5.6 × 1018 cm−3 are relatively in good agreement with the corresponding PL intensities of 45 and 73 count/nm, respectively, for 20 and 30-W grown SiOx samples.. The C–V curves of the NC-Si embedded MOSLEDs show flat-band voltage shift of 0.74 and 18.46 Vfor 20 and 30-W samples, respectively. The C-V hysteresis width also increases by enlarging the range of sweeping voltage. A strong correlation between the size/density of Si nanocrystals and the flatband voltage difference has been concluded. In the case of the C–t measurement, the charging and discharging behaviors were found to depend on charging conditions. Finally, the relationship of the electron/hole charge density with the retention time is analyzed. Our data shows the charge loss rate of 1.3 % for electron is better at 20-Wsample, but the charge loss rate of 0.23 % for hole is better at 30-Wsample with Si NCs embedded in MOSLED after 102 s.

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

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