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Low Temperature Poly-Si Layers Deposited by Hot Wire CVD Yielding a Mobility of 4.0 cm2V−1s−1 in Top Gate Thin Film Transistors

Published online by Cambridge University Press:  17 March 2011

R.E.I. Schropp ,
J.K. Rath ,
B. Stannowski ,
C.H.M. Van Der Werf ,
Y. Chen  and
S. Wagner
R.E.I. Schropp
Affiliation:
Utrecht University, Debye Institute, P.O.Box 80000, 3508 TA Utrecht, The Netherlands
J.K. Rath
Affiliation:
Utrecht University, Debye Institute, P.O.Box 80000, 3508 TA Utrecht, The Netherlands
B. Stannowski
Affiliation:
Utrecht University, Debye Institute, P.O.Box 80000, 3508 TA Utrecht, The Netherlands
C.H.M. Van Der Werf
Affiliation:
Utrecht University, Debye Institute, P.O.Box 80000, 3508 TA Utrecht, The Netherlands
Y. Chen
Affiliation:
Department of Electrical Engineering and Center for Photonics and Optoelectronic Materials, Princeton University, Princeton, NJ 08544-5263, USA
S. Wagner
Affiliation:
Department of Electrical Engineering and Center for Photonics and Optoelectronic Materials, Princeton University, Princeton, NJ 08544-5263, USA
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Abstract

Direct deposition of polycrystalline silicon (poly-Si) thin films by the Hot Wire CVD method has been used for the first time for the fabrication of poly-Si top gate Thin Film Transistors (TFTs). The TFTs have a high electron mobility in saturation of up to 4 cm2V−1s−1 as well as a remarkably large ON/OFF ratio of up to 6 × 105.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 609: Symposium A – Amorphous & Heterogeneous Silicon Thin Films – 2000 , 2000 , A31.3
Copyright
Copyright © Materials Research Society 2000

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References

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