Hostname: page-component-586b7cd67f-2brh9 Total loading time: 0 Render date: 2024-11-29T07:42:58.770Z Has data issue: false hasContentIssue false
  • English
  • Français

Integration Processes and Properties of Pt/Pb5Ge3O11/(Zr, Hf)O2/Si One Transistor Memory Devices

Published online by Cambridge University Press:  17 March 2011

Tingkai Li ,
Sheng Teng Hsu ,
Bruce Ulrich  and
Lisa Stecker
Tingkai Li
Affiliation:
Sharp Laboratories of America, Inc, 5700 NW Pacific Rim Blvd. Camas, WA 98607
Sheng Teng Hsu
Affiliation:
Sharp Laboratories of America, Inc, 5700 NW Pacific Rim Blvd. Camas, WA 98607
Bruce Ulrich
Affiliation:
Sharp Laboratories of America, Inc, 5700 NW Pacific Rim Blvd. Camas, WA 98607
Lisa Stecker
Affiliation:
Sharp Laboratories of America, Inc, 5700 NW Pacific Rim Blvd. Camas, WA 98607
Get access

Abstract

The basic mechanism for one transistor memory device has been studied. Ferroelectric material, Pb5Ge3O11 (PGO) was selected for MFOS (M: Metal, F: Ferroelectrics, O: oxide, S: silicon) memory transistor fabrication. Processing of one-transistor memory devices dealt with the following issues: decomposition of ferroelectric materials, the etching damage of ferroelectric materials, the forming gas annealing damage of ferroelectric materials, the selective deposition of ferroelectric materials, the alignment for device making processes. The integration processes for one transistor memory device have been optimized to reduce process-induced damages. The gate dielectric material is (Zr, Hf)O2. Extremely high c-axis oriented Pb5Ge3O11 thin films were successfully deposited on high k gate oxide. Memory transistors having 0.6, 3 and 10μm channel length and 10 μm channel width have been fabricated. The memory windows are around 1 - 2V. The memory windows are almost saturated from operation voltage of 4V. After programming at -5V (on “off” state), the drain current (ID) at VD of 1V and VG of 2.5 V is about 1.15 ×10−10A. After programming at 5 V (on “on” state) the drain current (ID) at VD of 1V and VG of 2.5 V is measured about 6.4 ×10−8 A, which was 2.5 order higher than that of “off” state.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 688: Symposium C – Ferroelectric Thin Films X , 2001 , C11.2.1
Copyright
Copyright © Materials Research Society 2002

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Looney, D. H., Semiconductive translating device, US Patent 2791758 (1957).Google Scholar
2. Brown, W.L., Semiconductive device, US Patent 2791759 (1957).Google Scholar
3. Ross, I. M., Semiconductive translating device, US Patent 2791760 (1957).Google Scholar
4. Morton, J. A., Electrical switching and storage, US Patent 2791761 (1957).Google Scholar
5. Kijima, T., and Matsunaga, H., Jpn. J. Appl. Phys. 38, 2281 (1999).Google Scholar
6. Imada, S., Shouriki, S., Tokumitsu, E., and Ishiwara, H., Jpn. J. Appl. Phys. 37, 6497 (1998).Google Scholar
7. FuJimori, Y., Izumi, N., Nakamura, T., and Kamisawa, A., Jpn. J. Appl. Phys. 38, 2285 (1999).Google Scholar
8. Li, T., Zhang, F. and Hsu, S., Appl. Phys. Lett. 74 (2) 296 (1999).Google Scholar
9. Li, T., Hsu, S., Lee, J., Gao, Y. and Engelhard, M., Mat. Res. Soc. Symp. Proc. Vol. 596, 443 (2000).Google Scholar
10. Ishiwara, H., IEEE 00CH37076, 331 (2000).Google Scholar
11. Li, Tingkai, Hsu, Sheng Teng, Ulrich, Bruce etc., Appl. Phys. Lett. 79 (11) 1661 (2001).Google Scholar
12. Li, T. and Hsu, S., Integrated Ferroelectrics, 27, 1-4, 797 (2000).Google Scholar
13. Li, Tingkai and Hsu, Sheng Teng, Integrated Ferroelectrics, 34, 55(2001).Google Scholar
14. Kang, Laegu, Lee, Byoung-Hun, Qi, Wen-Jie, Jeon, Yong-Joo, Nieh, Renee, Gopalan, Sundar, Onishi, Katsunori and Lee, Jack C., Mat. Res. Soc. Symp. Proc. Vol. 592, 81(2000).Google Scholar