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Insulator/GaN Heterostructures of Low Interfacial Density of States

Published online by Cambridge University Press:  15 March 2011

M. Hong
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
H. M. Ng
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
J. Kwo
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
A. R. Kortan
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
J. N. Baillargeon
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
K. A. Anselm
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
J. P. Mannaerts
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
A. Y. Cho
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
C. M. Lee
Affiliation:
Department of Electrical Engineering, National Central University, Taiwan
J. I. Chyi
Affiliation:
Department of Electrical Engineering, National Central University, Taiwan
T. S. Lay
Affiliation:
Institute of Opto-Electronic Engineering, National Sun Yat-Sen University, Taiwan
F. Ren
Affiliation:
Dept. Chem. Eng. and Dept. Mat. Sci. & Eng., University of Florida, Gainesville, Forida
C. R. Abernathy
Affiliation:
Dept. Mat. Sci. & Eng., University of Florida, Gainesville, Forida
S. J. Pearton
Affiliation:
Dept. Mat. Sci. & Eng., University of Florida, Gainesville, Forida
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Abstract

A review is given on insulators (oxides and nitrides) which have been deposited on GaN to form metal-insulator (oxides and nitrides)-semiconductor (MOS or MIS) diodes with a low interfacial density of states (Dit). These insulators include AlN, SiO2, Si3N4, SiO2/Ga2O3, and Ga2O3(Gd2O3). Techniques for depositing these insulators and methods for cleaning GaN surfaces prior to the insulator deposition are discussed. Recent progress on GaN MOSFET's (with SiO2/Ga2O3, and Ga2O3(Gd2O3) as gate dielectrics) and MISFET's (with AlN as a gate dielectric) is also reviewed. When exposed to room air, GaN surface is not as robust as previously thought. Therefore, preparation of a clean GaN surface for deposition of oxides and nitrides is necessary to achieve a low Dit. By heating GaN samples in UHV to clean the surfaces followed by deposition of Ga2O3(Gd2O3) and SiO2, we have achieved a low Dit with negligible hysteretic loops in the capacitance-voltage curves

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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