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In Situ Wafer Cleaning Prior to Selective HemiSpherical Grain (HSG) Poly-Silicon Deposition Using RT-CVD

Published online by Cambridge University Press:  10 February 2011

B. J. Brosilow ,
S. Levy  and
Y. E. Gilboa
B. J. Brosilow
Affiliation:
AGI Inc., 4425 Fortran Drive, San Jose, CA 95134-2300
S. Levy
Affiliation:
AGI Inc., 4425 Fortran Drive, San Jose, CA 95134-2300
Y. E. Gilboa
Affiliation:
AGI Inc., 4425 Fortran Drive, San Jose, CA 95134-2300
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Abstract

Hemispherical grained (HSG) polycrystalline-silicon surfaces are used in DRAM manufacturing to enhance cell capacitance by increasing the surface area of the capacitor electrodes. We study the formation of HSG poly-silicon in a Rapid Thermal CVD (RT-CVD) cluster tool with in-situ native oxide removal. Compared to conventional ex-situ wet cleaning procedures, use of the in-situ native oxide removal both decreases the process temperature at which HSG formation occurs and increases the width of the temperature window within which desirable HSG layers are formed.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 525: Symposium W – Rapid Thermal & Integrated Processing VII , 1998 , 365
Copyright
Copyright © Materials Research Society 1998

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References

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