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Impact of Annealing on the Resistivity of Ultrafine Cu Damascene Interconnects

Published online by Cambridge University Press:  01 February 2011

G. Steinlesberger
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany Vienna University of Technology, 1040 Vienna, Austri
M. Engelhardt
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany
G. Schindler
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany
W. Steinhögl
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany
M. Traving
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany
W. Hönlein
Affiliation:
Infineon Technologies, Corporate Research, 81739 Munich, Germany
E. Bertagnolli
Affiliation:
Vienna University of Technology, 1040 Vienna, Austri
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Abstract

The influence of different annealing conditions on the electrical resistivity of copper damascene interconnects with lateral dimensions down to sub-50 nm was studied. Different thermal treatments after copper plating as well as annealing processes in addition to the final anneal step were carried out in order to study the microstructural change of copper damascene lines. It was found that rapid thermal annealing (RTA) at high temperatures (600°C) leads to an enlargement of the Cu grains by a factor of 2 for wide lines, whereas a significant impact of annealing on the median grain size of ultrafine lines was not observed. This is attributed to the geometrical limitation of the grain growth process. As a result, the size effect in Cu nano-interconnects which is mainly determined by grain boundaries acting as scattering sites for electrons cannot be reduced significantly by using thermal treatments.

Type
Research Article
Copyright
Copyright © Materials Research Society 2003

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References

/1/ Steinhögl, W., Schindler, G., Steinlesberger, G., Engelhardt, M., Phys. Rev. B 66, 075414, (2002)Google Scholar
/2/ Kuan, T., K. Inoki, C., Oehrlein, G. S., Rose, K., Zhao, Y.P., Wang, G.C., Rossnagel, S. M., and Cabral, C., Mat. Res. Soc. Samp. Proc. 612, D 7.1.1, (2000)Google Scholar
/3/ Hinode, K., Hanaoka, Y., Takeda, K., Kondo, S., Jpn. J. Appl. Phys. Vol 40, p. L 1097, (2001)Google Scholar
/4/ Kim, Ch.U., Proceedings of Advanced Metallization Conference (AMC), in print, (2002)Google Scholar
/5/ Steinlesberger, G., Steinhögl, W., Schindler, G., Engelhardt, M., Traving, M., Bertagnolli, E., Proceedings of Advanced Metallization Conference (AMC), in print, (2002)Google Scholar
/6/ Steinlesberger, G., Engelhardt, M., Schindler, G., Kretz, J., Steinhögl, W., Bertagnolli, E., Solid State Electronics (SSE), in print, (2002)Google Scholar
/7/ Gutt, Th., Steinegger, Th., Processing of 10th IEEE International Conference on Advanced Thermal Semiconductors – RTP, (2002)Google Scholar
/8/ Zschech, E., Blum, W., Zienert, I., Besser, P. R., Effect of Copper Line Geometry and Process Parameters on Interconnect Microstructure and Degradation Processes, Z. Metallkunde, Carl Hanser Verlag München, (2001)Google Scholar