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GexSil-x Layers Grown by Rapid Thermal Processing Chemical Vapor Deposition

Published online by Cambridge University Press:  25 February 2011

K. H. Jung ,
Y. M. Kim ,
H. G. Chun ,
D. L. Kwong  and
L. Rabenberg
K. H. Jung
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
Y. M. Kim
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
H. G. Chun
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
D. L. Kwong
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
L. Rabenberg
Affiliation:
Center for Materials Science and Engineering, The University of Texas at Austin, Austin, TX 78712
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Abstract

Rapid thermal processing chemical vapor deposition was used to grow single and multilaye repitaxial GexSil-x/Si structures on (100)Si substrates using GeH4 and SiH2Cl2 at 900°C and 1000°C with SiH2Cl2:GeH4 ratios of 14:1 to 95:1 at 5 Torr. Misfit dislocation free layers with few threading dislocations were grown for Ge concentrations of up to 13%. Misfit dislocation networks aligned along <110> were formed at the interface of films with higher Ge concentrations. Dislocation loops were also found at the interface. GexSil-x layers grown at 1000°C were highly crystalline, but relaxed. In multi-layer structures, AES depth profiles showed Ge pile-up at the GexSi1-x/Si interface of layers with higher Ge concentrations.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 146: Symposium B – Rapid Thermal Annealing/Chemical Vapor Deposition and Integrated Processing , 1989 , 115
Copyright
Copyright © Materials Research Society 1989

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References

REFERENCES

1 Pearsall, T. P. and Bean, J. C., IEEE Electron Dev. Lett., EDL–7, 308 1986.Google Scholar
2 Patton, G. L., Iyer, S. S., DeLage, S. L., Tiwari, S., and Stork, J. M. C., IEEE Electron Dev. Lett., EDL–9, 165 1988.Google Scholar
3 Temkin, H., Pearsall, T. P., Bean, J. C., Logan, R. A., and Luryi, S., Appl. Phys. Lett., 48, 963 1986.Google Scholar
4 Lee, S. K., Ph. D. dissertation, The University of Texas at Austin (1988).Google Scholar
5 Hsieh, T. Y., Chun, H. G., Kwong, D. L., and Spratt, D. B., B 1.7, to be presented at the MRS Spring Meeting (1989).Google Scholar
6 Jung, K. H., Kim, Y. M., Chun, H. G., Kwong, D. L., Rabenberg, L., A6.22, to be presented at the MRS Spring Meeting (1989).Google Scholar