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Fine Keyed Alignment and Bonding for Wafer-Level 3D ICs

Published online by Cambridge University Press:  01 February 2011

Sang Hwui Lee
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, 110 8th St. RPI, CII 6015, Troy, NY, 12180, United States
Frank Niklaus
Affiliation:
[email protected], Royal Institute of Technology, Stockholm, N/A, Sweden
J. Jay McMahon
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
Jian Yu
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
Ravi J. Kumar
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
Hui-feng Li
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
Ronald J. Gutmann
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
Timothy S. Cale
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
J.-Q. Lu
Affiliation:
[email protected], Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY, 12180, United States
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Abstract

Precise wafer-to-wafer alignment accuracy is crucial to interconnecting circuits on different wafers in three dimensional integrated circuits. We discuss the use of fabricated structures on wafer surfaces to mechanically achieve higher alignment accuracy than can be achieved with our existing (baseline) alignment protocol. The keyed alignment structures rely on structures with tapered side-walls that can slide into each after two wafers are “pre-aligned” using our baseline alignment protocol. Results indicate that alignment accuracy is about a quarter micron, well below the one micron alignment accuracy obtained in our baseline alignment procedure using commercial state-of-the-art wafer alignment equipment. In addition to improving alignment, the alignment structures also hinder undesirable bonding-induced misalignment. The keyed alignment structures are also promising for nano-imprint lithography.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

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References

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