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Elimination of Subboundaries in 0.5-µm-Thick Si-on-Insulator Films Produced by ZMR

Published online by Cambridge University Press:  28 February 2011

M. W. Geis
Affiliation:
Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02173-0073
C. K. Chen
Affiliation:
Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02173-0073
Henry I. Smith
Affiliation:
Department of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139
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Abstract

When Si-on-insulator films 0.3 to 0.5 µm thick are recrystallized by zone melting under the usual conditions, the defect trails within grains are subboundaries. We report that the use of an entrainment pattern, consisting of a grating of carbonized photoresist on top of the SiO2 encapsulating layer, can lead to the replacement of subboundaries by defect trails that are spaced dislocation clusters or discrete threading dislocations. Such defects are expected to be less detrimental to submicrometer MOSFET circuits than subboundaries.

Type
Articles
Copyright
Copyright © Materials Research Society 1987

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References

[1] Geis, M.W., Smith, H.I., Chen, C.K., J. Appl. Phys. 60, 1152 (1986).Google Scholar
[2] Geis, M.W., Chen, C.K., Smith, H.I., Nitishin, P.M., Tsaur, B-Y. and Mountain, R.W., “Elimination of Subboundaries from Zone-Melting-Recrystallized Silicon-On-Insulator Films,” p. 39, Symp. Proc., Vol.53, Mat. Res. Soc., 1986.CrossRefGoogle Scholar
[3] Chen, C.K., Geis, H.W., Finn, M.C., and Tsaur, B-Y., Appl. Phys. Lett., 48, 1300 (1986).Google Scholar
[4] Geis, M.W., Smith, H.I., Silversmith, D.J., Mountain, R.W. and Thompson, C.V., J. Electrochem. Soc., 130, 1178 (1983).Google Scholar
[5] Im, J.S., Thompson, C.V., and Tomita, H., “Solidification Interface Morphologies in Zone Melting Recrystallization,” Proc. fall meeting, Mat. Res. Soc., Boston, MA, Dec. 1986.Google Scholar