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Published online by Cambridge University Press: 21 May 2012
We propose a new nonvolatile resistance device having a metal/Al2O3/3C-SiC/n-Si/metal metal-insulator-semiconductor (MIS) structure. It is explained that the electron trapping states are generated in the Al2O3/3C-SiC interface region of the 3C-SiC layer due to partial oxidation of the 3C-SiC near the interface, and that the on and off states of the device are caused by trapping and detrapping of electrons in the defect states through the Al2O3 layer. The electron capture in the defect states causes high electric-field in the oxide layer which results in high-rate electron tunneling through the oxide layer and lowering the device resistance. We have previously reported the similar memory behavior with a metal/SiO2/SiOx /3C-SiC/n-Si/metal MIS structure, however the new memory exhibits more enhanced endurance characteristics than those of the previous memory, where the trapped electrons are injected and ejected through the 3C-SiC layer.