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Electrical Characteristics of Tisi2/n+-Polysilicon/Sio2/Si Mos Capacitors Stressed Under High Temperature Silicide Processing Conditions

Published online by Cambridge University Press:  22 February 2011

K. Shenai ,
P. A. Piacente  and
B. J. Baliga
K. Shenai
Affiliation:
General Electric Corporate Research and Development, River Road, Schenectady, NY 12309
P. A. Piacente
Affiliation:
General Electric Corporate Research and Development, River Road, Schenectady, NY 12309
B. J. Baliga
Affiliation:
General Electric Corporate Research and Development, River Road, Schenectady, NY 12309
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Abstract

Detailed electrical characteristics of TiSi2/n+-polysilicon/SiO2/Si MOS capacitors stressed under a variety of high temperature processing conditions is reported. These devices have ˜2000Å TiSi2 formed by a two-step thermal anneal on heavily POCl3doped polysilicon with thicknesses of 6 kÅ and 8 kÅ. These structures were capped with 8 kÅ of SiO2 and stressed in nitrogen at process temperatures in the range of 700° C to 1100° C. The electrical performance was evaluated in terms of I-V, C-V, Fowler-Nordheim tunneling, and SiO2/Si interface characteristics of MOS structures. A systematic degradation of the SiO2/Si interface was observed due to process limitations of TiSi2 at high Lemperatures.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 105: Symposium F – SiO2 and Its Interfaces , 1987 , 295
Copyright
Copyright © Materials Research Society 1988

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