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Effect of N+ Ion Implantation and Gox Process on in and B Channel Profile

Published online by Cambridge University Press:  17 March 2011

G. Curello
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
R. Rengarajan
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
J. Faul
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
H. Wurzer
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
J. Amon
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
T. Gaertner
Affiliation:
Unit Processes Dept. - Koenigsbruecker Strasse 180, D-01099 Dresden, Germany
D. Henke
Affiliation:
Unit Processes Dept. - Koenigsbruecker Strasse 180, D-01099 Dresden, Germany
M. Schmeide
Affiliation:
Unit Processes Dept. - Koenigsbruecker Strasse 180, D-01099 Dresden, Germany
A. Kieslich
Affiliation:
Technology Development Dept., i n f i n e o n technologies AG, Memory Products Division
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Abstract

In this work, we report on the effect of different dual gate oxide (DGox) processes on the electrical properties of CMOS devices in deep submicron embedded DRAM (eDRAM) technology. Also discussed, is the effect of N+ Ion Implantation on the diffusion / segregation behaviour of B and In channel dopants. In particular, it will be shown that the N+ dose required to obtain a certain combination of dual gate oxide thickness varies with the gate oxide process. Effects of N+ dose on the In and B channel profiles are studied using SIMS. The impact of “thickness-equivalent” DGox processes on short channel effect (SCE) and carrier mobility is analyzed and tradeoffs for optimization of device performances are discussed.

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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References

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