We present experimental results on the transient response of the source-drain current of laser crystallised polycrystalline silicon (poly-Si) thin film transistors (TFTs) over many orders of magnitude in time after the application of a voltage pulse to the gate electrode. This work follows on from similar measurements performed on amorphous silicon (a-Si) TFTs. Results showed a definite change in transient behaviour dependent on the magnitude of the gate bias. At a gate voltage of 5V there was an initial decay then a marked increase in the source-drain current beyond 1000 seconds. This variation of transient behaviour with gate bias was not seen in the a-Si case. For poly-Si the transient behaviour could not be split into different regimes in time (beyond the carrier transit time) whereas for a-Si TFTs the source-drain current showed a logarithmic decay at room temperature up to 100 seconds followed by a power law decay beyond 100 seconds. Our results indicate perhaps that only one mechanism exists for the observed transient decay of current, unlike the a-Si case. Measurements carried out at elevated temperature showed the current decay was independent of temperature indicating that the transient decay may be caused by charge injection via a tunnelling process into interface states, gate dielectric or passivation dielectric. Finally by carrying out measurements on TFTs after moderate positive voltage stressing and on TFTs with specially fabricated gate and passivation dielectrics it has been established that the transient decay is dielectric related and not a defect generation process.