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Dependence of Reliability of Ultrathin Mos Gate Oxides on the Fermi Level Positions at Gate and Substrate

Published online by Cambridge University Press:  10 February 2011

Tien-Chun Yang ,
Navakanta Bhat  and
Krishna C. Saraswat
Tien-Chun Yang
Affiliation:
Department of Electrical Engineering, Stanford University, Stanford, CA 94305
Navakanta Bhat
Affiliation:
Department of Electrical Engineering, Stanford University, Stanford, CA 94305
Krishna C. Saraswat
Affiliation:
Department of Electrical Engineering, Stanford University, Stanford, CA 94305
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Abstract

We demonstrate that the reliability of ultrathin (< 10 nm) gate oxide in MOS devices depends on the Fermi level position at the gate, and not on the position at the substrate for constant current gate injection (Vg-). The oxide breakdown strength (Qbd) is less for p+ poly-Si gate than for n+ poly-Si gate, but, it is independent of the substrate doping type. The degradation of oxides is closely related to the electric field across the gate oxide, which is influenced by the cathode Fermi level. P+ poly-Si gate has higher barrier height for tunneled electrons, therefore, the cathode electric field must be higher to give the same injection current density. A higher electric field gives more high energy electrons at the anode, and therefore the damage is more at the substrate interface. Different substrate types cause no effect on the oxide electric field, and as a result, they do not influence the degradation.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 473: Symposium J – Materials Reliability in Microelectronics VII , 1997 , 123
Copyright
Copyright © Materials Research Society 1997

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References

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