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Deep Level Transient Spectroscopy of Defects Induced by the Combination of CF4 Reactive Ion Etching and Oxidation in Metal-Oxide-Silicon Capacitors.

Published online by Cambridge University Press:  25 February 2011

Dominique Vuillaume  and
Jeff P. Gambino
Dominique Vuillaume
Affiliation:
Lab. de Physique des Solides, CNRS UA253, ISEN 41 Bd Vauban, 59046 Lille cedex, France
Jeff P. Gambino
Affiliation:
IBM East Fishkill, Hopewell Jct., NY 12533, USA
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Abstract

Metal-Oxide-silicon (MOS) capacitors have been fabricated on CFb reactive ion etched silicon (n and p types) in order to study the defects at the Si-Si02 interface and in the bulk of the substrate, produced by the combination of reactive ion etching (RIE) and oxidation. Bulk defects and fast interface states are analysed by Deep Level Transient Spectroscopy (DLTS) and the slow interface states in the oxide layer near the interface are probed by Tunnel-DLTS. A density of fast interface states in the range 1010-1011 cm−2 eV−1 is observed for capacitors (both n and p types) fabricated with either dry or wet oxidations, and is probably due to disrupted or strained bonds at the Si-SiO2 interface. The observation of bulk defects in the wet-RIE oxide samples but not in the dry-RIE oxide samples may be related to the shorter oxidation time for wet oxides (31mn) compared to dry oxides(190mn) and explained by a greater annealing of RIE induced defects during the dry oxidation. The bulk traps are identified to be related to carbon contamination, in SiC form, introduced during RIE. Finally, an increase of the slow interface states density is observed for the n-type dry oxide samples.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 148: Symposium D – Chemistry and Defects in Semiconductor Heterostructures , 1989 , 421
Copyright
Copyright © Materials Research Society 1989

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