Hostname: page-component-78c5997874-v9fdk Total loading time: 0 Render date: 2024-11-19T02:08:41.691Z Has data issue: false hasContentIssue false
  • English
  • Français

A Closer “Look” at Modern Gate Oxides

Published online by Cambridge University Press:  14 March 2011

Frieder H. Baumann ,
C.-P. Chang ,
John L. Grazul ,
Avid Kamgar ,
C. T. Liu  and
David A. Muller
Frieder H. Baumann
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
C.-P. Chang
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
John L. Grazul
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
Avid Kamgar
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
C. T. Liu
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
David A. Muller
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, NJ 07974
Get access

Abstract

Using high resolution TEM (HRTEM), we identified some process induced ‘weak spots’ in SiO2 layers: First, we observed thinning in the periphery of the transistor, i. e. near the boundary to the shallow trench isolation. At the boundary to the shallow trench, the Si substrate gradually changes its orientation from <100> to <110>, which results in an unexpected oxidation behavior in this region. Secondly, we observed the intrusion of poly-Si grains from the gate into the gate oxide, resulting in local thinning of the dielectric. Using image simulations, we show that conventional high resolution TEM can reveal the interface roughness only to a very limited extend.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 611: Symposium C – Gate Stack & Silicide Issues in Silicon Processing , 2000 , C4.1.1
Copyright
Copyright © Materials Research Society 2000

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Weir, B. E. et al. , 1997 IEDM Technical Digest, 73, (1997)Google Scholar
2. Timp, G. L. et al. , 1997 IEDM Technical Digest, 930, (1997)Google Scholar
3. Muller, D. A., Sorsch, T., Moccio, S., Baumann, F. H., Evans-Lutterodt, K., and Timp, G., Nature, Vol. 399, 6738, 758, (1999)Google Scholar
4. Pinto, M. R., Coughran, W. M., Rafferty, C. S., Sangiorgi, E., and Smith, R. K., In: K, Hess, Leburton, J P, Ravaioli, U (eds.): Computational Electronics, Kluwer Academic Publishers, Norwell, MA. (1991)Google Scholar
5. Chang, C. P. et al. , 1997 IEDM Technical Digest, 661, (1997)Google Scholar
6. Liu, C. T., Baumann, F. H., Ghetti, A., Vuong, H. H., Chang, C. P., Cheung, K. P., Colonell, J. I., Lai, W. Y. C., Lloyd, E. J., Miner, J. F., Pai, C. S., Vaidya, H., Liu, R., Clemens, J. T., 1999 VLSI Symposium, (1999)Google Scholar
7. Spence, J. C. H., Experimental High-Resolution Electron Microscopy, 2. Edition, Oxford University Press, New York Oxford, (1999)Google Scholar
8. O'Keefe, M. A. and Kilaas, R., Users Guide to NCEMSS, and references therein, http://ncem.lbl.gov/frames/software.htmGoogle Scholar
9. Bennett, C. H., J. Appl. Phys., Vol. 43, No. 6, 2727, (1971)Google Scholar
10. , Ohdomari, Mihara, T., and Kai, K., J. Appl. Phys. 60 (11), 3900, (1996)Google Scholar
11. Akatsu, H. and Ohdomari, I., Appl. Surf. Science 41/42, 357, (1989)Google Scholar
12. Goodnick, S. M. et al. , Phys. Rev. B, Vol. 32, No. 12, 8171, (1985)Google Scholar
13. Wolf, S. and Tauber, R. N., Silicon Processing for the VLSI Era, Vol. 1, Lattice Press, Sunset Beach, California, 212, (1986)Google Scholar
14. Ourmazd, A., Baumann, F. H., Bode, M. and Kim, Y., Ultramicroscopy, Vol. 34, 237, (1990)Google Scholar
15. Feichtinger, H., “The devil never sleeps”., private communication, (1987)Google Scholar