Hostname: page-component-586b7cd67f-dsjbd Total loading time: 0 Render date: 2024-11-20T06:35:51.870Z Has data issue: false hasContentIssue false

Characterization of SiGeC Using Pt(SiGeC) Silicide Schottky Contacts

Published online by Cambridge University Press:  10 February 2011

Jeff J. Peterson
Affiliation:
1 Dept. of Electrical and Computer Engineering, Univ. of California, Davis, CA 95616, USA
Charles E. Hunt
Affiliation:
1 Dept. of Electrical and Computer Engineering, Univ. of California, Davis, CA 95616, USA
McDonald Robinson
Affiliation:
Lawrence Semiconductor Research Laboratory Inc., Tempe, AZ 85282, USA
Robin SCott
Affiliation:
Lawrence Semiconductor Research Laboratory Inc., Tempe, AZ 85282, USA
Get access

Abstract

Material and electrical characterization of n-type and p-type Si1-x-yGex Cy epitaxial layers on Si(100) was performed using silicided platinum Schottky contacts. XRD studies show Pt silcidation of SiGeC proceeds from non-reacted Pt to Pt2(SiGeC) and completes with the Pt(SiGeC) phase similar to Pt/Si silicides, but Pt silicide reactions with SiGeC are shown to require higher temperatures than Pt reactions with Si. Electrical characterization of Pt(SiGeC) contacts to n-type Sil1-x-yGexCx/Si shows rectifying behavior with constant barrier heights of 0.67eV independent of composition, indicating Fermi level pinning relative to the SiGeC conduction band is occurring. Pt(SiGeC) contacts to p-type Si1-x-yGexCy/Si are also rectifying with barrier heights that track the variation of the SiGeC energy bandgap.

Type
Research Article
Copyright
Copyright © Materials Research Society 1998

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Powell, A. R., Eberl, K., Ek, B. A. and Iyer, S. S., J. Crystal Growth 127, p. 425429 (1993).Google Scholar
2. , Jian Mi, Gupta, Ashwant, Yang, Cary Y., Zhu, Jintian, Yu, Paul K. L., Warren, Patricia and Dutoit, Michel, AppL Phys. Lett. 69 (24), pp. 37433745 (9 December 1996).Google Scholar
3. Donaton, R. A., Maex, K., Vantomme, A., Langouche, G., Morciaux, Y., Amour, A. St. and Sturm, J. C., Appl. Phys. Lett. 70 (10), pp. 12661268 (10 March 1997).Google Scholar
4. Eyal, A., Brener, R., Beserman, R., Eizenberg, M., Atzmon, Z., Smith, David J. and Mayer, J. W., Appl. Phys. Lett. 69 (1), pp. 6466 (1 July 1996).Google Scholar
5. Mamor, M., Guedj, C., Boucaud, P., Meyer, F., Bouchier, D., Bodnar, S. and Regolini, J. L. in Strained Layer Epitaxy - Materials, Processing, and Device Applications, edited by Fitzgerald, E., Hoyt, J., Cheng, K. and Bean, J. (Mater. Res. Soc. Proc. 379, Pittsburg, PA 1995), pp. 137141.Google Scholar
6. Meyer, F., Mamor, M., Aubry-Fortuna, V., Warren, P., Bodnar, S., Dutartre, D. and Regolini, J. L., J. Elec. Mater. 25 (11), pp.17481753 (1996).Google Scholar
7. Shur, M., Physics of Semiconductor Devices, Prentice Hall, Englewood Cliffs, New Jersey, 1990, p. 205.Google Scholar
8. Colgan, E. G., J. Mater. Res. 10 (8), pp. 19531957 (August 1995).Google Scholar
9. Nicolet, M.-A. and Lau, S. S. in VLSI Electronics - Materials and Process Characterization, edited by Einspruch, N. and Larrabee, G. (VLSI Electronics Microstructure Science, VoL 6, Academic Press, New York, NY 1983 ), p. 346.Google Scholar
10. Liou, H. K., Wu, X., Gennser, U., Kesan, V. P., Iyer, S. S., Tu, K. N. and Yang, E. S., AppL Phys. Lett. 60 (5), pp. 577579 (3 February 1992).Google Scholar
11. Shur, M., Physics of Semiconductor Devices, Prentice Hall, Englewood Cliffs, New Jersey, 1990, p. 169.Google Scholar