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Characteristics of Sub-micron Polysilicon Thin Film Transistors

Published online by Cambridge University Press:  15 February 2011

Kola R Olasupo
Affiliation:
AT&T Bell Laboratories, Allentown, PA 18103, Tel: (215)439-7348
Professor M. K. Hatalis
Affiliation:
EECS Department, Display Research Laboratory, Lehigh University, Bethlehem, PA 18105, Tel:(215)758-3944
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Abstract

The polysilicon thin film transistor has been actively studied for the large area display applications like active matrix liquid crystal displays and for load cell in static random access memories. Due to low effective carrier mobility in polysilicon, the circuit speed is limited. Since the circuit delay time is directly proportional to the square of the channel length, short channel TFTs will be advantageous for high speed applications. In this work, we have studied the current voltage characteristics of an inverted sub-micron P-channel polysilicon thin-film transistor with self-aligned LDD structure to obtain a well-controlled channel and drain offset lengths. The particular features we examined are the leakage current and mobility. The leakage current and the ON current were found to be in the picoamp and micro-amp range respectively for devices having channel length in the range of 1.0μm to 0.35μm. Even very small devices having L&W = 0.35μm × 0.35μm exhibited characteristics similar to wider devices. The on/off current ratio was in the order of 105 before hydrogenation.

Type
Research Article
Copyright
Copyright © Materials Research Society 1994

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References

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