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Atomistic Simulation of Void Formation in ic Metal Interconnects

Published online by Cambridge University Press:  25 February 2011

A. S. Nandedkar
Affiliation:
IBM, Theoretical Modeling Department, Semiconductor R&D Center, East Fishkill, Zip 47C, Hopewell Junction, NY.
G. R. Srinivasan
Affiliation:
IBM, Theoretical Modeling Department, Semiconductor R&D Center, East Fishkill, Zip 47C, Hopewell Junction, NY.
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Abstract

We present an atomistic model to study void formation in aluminum interconnects in integrated circuit (1C) chips. Aluminum single and bicrystals were studied with various concentrations of vacancies and strain levels. It was found that either vacancies or tensile strains could lead to void formation. It will be shown that the void formation can be prevented by maintaining compressive strains in the computational cells.

Type
Research Article
Copyright
Copyright © Materials Research Society 1992

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References

REFERENCES

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