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AIGaAs Microelectronic Device Processing Using an as Capping Layer

Published online by Cambridge University Press:  22 February 2011

J.K. Grepstad
Affiliation:
Norwegian Institute of Technology, Dept. of Physical Electronics, N-7034Trondheim, Norway
H. Husby
Affiliation:
Norwegian Institute of Technology, Dept. of Physical Electronics, N-7034Trondheim, Norway
R.W. Bernstein
Affiliation:
SINTEF-SI, Dept. of Microelectronics, N-0314 Oslo, Norway
B.-O. Fimland
Affiliation:
Norwegian Institute of Technology, Dept. of Physical Electronics, N-7034Trondheim, Norway
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Abstract

The case for incorporating an arsenic capping layer in compound semiconductor device processing has been investigated with x-ray photoelectron spectroscopy (XPS), low-energy electron diffraction (LEED) and scanning electron microscopy (SEM). The As cap was found to be stable upon exposure to common processing chemicals, such as acetone, photoresist, developer, and N-methyl-2-pyrrolidone, a common polyimide solvent. A clean, c(4×4)-reconstructed GaAs(001) surface was recovered after thermal desorption of the cap in ultra-high vacuum, for a sample exposed to standard (maskless) photolithography. We also report a new technique for reactive decapping at room temperature, using a beam of hydrogen radicals (H*). Pattern definition in the As cap with ∼ 5 μm linewidth was demonstrated, using this technique. However, XPS and SEM data for the H*-etched specimens showed clear evidence of superficial gallium (sub)oxide and of As residues along the photoresist mask edges. This novel method of As cap patterning thus needs further refinement, before being useful to III-V device processing.

Type
Research Article
Copyright
Copyright © Materials Research Society 1994

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