The motivation of this study is to provide answers to questions rising with 3D stacking of semiconductor chips. This includes the development and validation of concepts for 1) Through Silicon Via (TSV) formation, 2) metal layer build-up, 3) various types of assembly and packaging concepts and methods, as well as 4) process characterization.

The investigations discussed here have been conducted on test wafer (ATEC2) developed by Fraunhofer IZM-ASSID. This design contains dedicated test structures which have been implemented to enable different unit processes and allows easy physical analysis. One of those test structures has been used to study the impact of the TSV density on the stress generation after TSV fill, anneal and CMP (chemical mechanical planarization) including copper protrusion and planarization behaviour. First results of the interaction between different TSV plating bath chemicals, anneal procedures and wafer bow obtained using test wafer ATEC1 were already presented during ICPT 2011.

The process flow applied in this investigation was (1) TSV filling by electro-plating, (2) anneal, and (3) CMP. Physical analysis including inline metrology has been conducted between all process steps.

The test wafers processed were divided into two groups according to the utilized copper plating bath chemistries. The copper TSV metallization was carried out by electro-chemical deposition in plating bath chemicals from two different suppliers. 3D microscope inspection was conducted for surface analysis. After TSV filling the copper surface shows protrusion on top of the TSVs and ring-shaped non-uniformities around the filled TSV. These structures were analysed after each step of the process flow.

An anneal process was conducted after TSV plating. The annealing temperature was varied to investigate its influence on the material properties (protrusion caused by copper recrystallization) and the dip behaviour. The experiments were accomplished at 250 degree Celsius and above.

Afterwards all test samples were processed by CMP with different selective slurries and analysed by AFM (atomic force microscopy) and optical methods. Bow and warpage measurements of the test wafers taken after each process step have been analysed.

Our investigation has demonstrated the influence of the additives on the behaviour of different plating bath chemistries during temperature treatment (copper recrystallization) and therefore also the planarization behaviour after CMP.