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1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Published online by Cambridge University Press:  01 February 2011

Giovanni Antonio Salvatore
Affiliation:
[email protected], EPFL, STI-IEL-LEG2, EPFL STI IEL LEG2, ELB 237 (Bâtiment ELB), Station 11, Lausanne, MA, 1015, Switzerland, +41216934607
Didier Bouvet
Affiliation:
[email protected], EPFL, STI/IEL/LEG2, EPFL STI IEL LEG2, ELB 237 (Bâtiment ELB), Station 11, Lausanne, 1015, Switzerland
Mihai Adrian Ionescu
Affiliation:
[email protected], EPFL, STI/IEL/LEG2, EPFL STI IEL LEG2, ELB 237 (Bâtiment ELB), Station 11, Lausanne, 1015, Switzerland
Sebastian Riester
Affiliation:
[email protected], EPFL, EPFL / STI / IMX / LC, EPFL STI IMX LC, MXD 231 (Bâtiment MXD), Station 12, Lausanne, 1015, Switzerland
Igor Stolichnov
Affiliation:
[email protected], EPFL, EPFL / STI / IMX / LC, EPFL STI IMX LC, MXD 231 (Bâtiment MXD), Station 12, Lausanne, 1015, Switzerland
Roman Gysel
Affiliation:
[email protected], EPFL, EPFL / STI / IMX / LC, EPFL STI IMX LC, MXD 231 (Bâtiment MXD), Station 12, Lausanne, 1015, Switzerland
Nava Setter
Affiliation:
[email protected], EPFL, EPFL / STI / IMX / LC, EPFL STI IMX LC, MXD 231 (Bâtiment MXD), Station 12, Lausanne, 1015, Switzerland
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Abstract

Interest in PVDF-TrFE copolymers as ferroelectric material for Memory application is driven by the prospect of having low cost, low operating voltage and fully organic device. Some previous studies reported FET designs using copolymers [refs 1,2] but none of these structures were fully integrated on silicon wafers and using a MOSFET fabrication process. We present for the first time the integration of a PVDF-TrFE (70%-30%) layer into a standard n-MOS transistor through a quasi-standard semiconductor technology. This allows us to achieve a Non Volatile Memory cell and at the same time to compact capacitor-transistor ferroelectric cell into a one-transistor memory cell.

Type
Research Article
Copyright
Copyright © Materials Research Society 2008

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References

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