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Through-silicon via stress characteristics and reliability impact on 3D integrated circuits

Published online by Cambridge University Press:  10 March 2015

Tengfei Jiang ,
Jay Im ,
Rui Huang  and
Paul S. Ho
Tengfei Jiang
Affiliation:
The University of Texas at Austin, USA; [email protected]
Jay Im
Affiliation:
The University of Texas at Austin, USA; [email protected]
Rui Huang
Affiliation:
The University of Texas at Austin, USA; [email protected]
Paul S. Ho
Affiliation:
Texas Materials Institute, The University of Texas at Austin, USA; [email protected]
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Abstract

Three-dimensional (3D) integration has emerged as a potential solution to the wiring limits imposed on chip performance, power dissipation, and packaging form factor beyond the 14 nm technology node. In 3D integrated circuits (ICs), the through-silicon via (TSV) is a critical element connecting die-to-die in the integrated stack structure. The thermal expansion mismatch between copper (Cu) vias and silicon (Si) can induce complex stresses in TSV structures to drive interfacial failure and Cu extrusion, degrading the performance and reliability of 3D interconnects. This article reviews current studies on thermal stresses and their effects on reliability of TSV structures. Recent results from measurements of stress and plasticity characteristics of Cu TSV structures are reviewed, including wafer curvature, micro-Raman spectroscopy, and synchrotron x-ray microdiffraction techniques. The effects of the Cu microstructure on stress and reliability, particularly on via extrusion and the device keep-out zone in TSV structures, are discussed. Based on the analysis of the reliability impact, we explore the potential of material and processing optimization to build reliable TSV structures for 3D ICs.

Keywords

microelectronicsthermal stressesCuSidevices
Type
Research Article
Information
MRS Bulletin , Volume 40 , Issue 3: Materials challenges in 3D IC technology , March 2015 , pp. 248 - 256
Copyright
Copyright © Materials Research Society 2015 

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References

Theis, T.N., IBM J. Res. Dev. 44 (3), 379 (2000).CrossRefGoogle Scholar
Lee, W.W., Ho, P.S., MRS Bull. 22 (10), 19 (1997).Google Scholar
Thompson, S.E., Sun, G., Choi, Y.S., Nishida, T., IEEE Trans. Electron Devices 53 (5), 1010 (2006).CrossRefGoogle Scholar
Stackhous, B., Cherkauer, B., Gowan, M., Gronowski, P., Lyles, C., IEEE Int. Solid-State Circuits Conf. 4, 91 (2008).Google Scholar
Hisamoto, D., Lee, W.-C., Kedzierski, J., Takeuchi, H., Asano, K., Kuo, C., Anderson, E., King, T.-J., Bokor, J., Hu, C., IEEE Trans. Electron Devices 47 (12), 2320 (2000).Google Scholar
Semiconductor Industry Association, “ITRS Road Map: The National Technology Roadmap for Semiconductors,” 2011.Google Scholar
Banerjee, K., Souri, S.J., Kapur, P., Saraswat, K.C., Proc. IEEE 89 (5), 602 (2001).Google Scholar
Knickerbocker, J.U., Patel, C.S., Andry, P.S., Tsang, C.K., Buchwalter, L.P., Sprogis, E.J., Hua, G., Horton, R.R., Polastre, R.J., Wright, S.L., Cotte, J.M., IEEE J. Solid-State Circuits 41 (8), 1718 (2006).CrossRefGoogle Scholar
Knickerbocker, J.U., Andry, P.S., Dang, B., Horton, R.R., Interrante, M.J., Patel, C.S., Polastre, R.J., Sakuma, K., Sirdeshmukh, R., Sprogis, E.J., Sri-Jayantha, S.M., Stephens, A.M., Topol, A.W., Tsang, C.K., Webb, B.C., Wright, S.L., IBM J. Res. Dev. 52 (6), 553 (2008).Google Scholar
Lau, J., Electronics Packaging Technology Conference, 560–570 (2010).Google Scholar
Garrou, P., Bower, C., Ramm, P., Handbook of 3D Integration (Wiley-VCH, Weinheim, Germany, 2008).Google Scholar
Van Olmen, J., Huyghebaert, C., Coenen, J., Van Aelst, J., Sleeckx, E., Van Ammel, A., Armini, S., Katti, G., Vaes, J., Dehaene, W., Beyne, E., Travaly, Y., Microelectron. Eng. 88 (5), 745 (2011).CrossRefGoogle Scholar
Kang, S., Cho, S., Yun, K., Ji, S., Bae, K., Lee, W., Kim, E., Kim, J., Cho, J., Mun, H., Park, Y.L., Proc. IEEE Int. 3D Syst. Integ. Conf. 1–4 (2012).Google Scholar
Mercha, A., Van der Plas, G., Moroz, V., De Wolf, I., Asimakopoulos, P., Minas, N., Domae, S., Perry, D., Choi, M., Redolfi, A., Okoro, C., Yang, Y., Van Olmen, J., Thangaraju, S., Tezcan, D.S., Soussan, P., Cho, J.H., Yakovlev, A., Marchal, P., Travaly, Y., Beyne, E., Biesemans, S., Swinnen, B., Proc. IEEE IEDM. 2.2.1–2.2.4 (2010).Google Scholar
Karmarker, A.P., Xu, X., Moroz, V., Proc. IEEE Int. Reliab. Phys. Symp. 682–687 (2009).Google Scholar
Ryu, S.K., Lu, K.H., Jiang, T., Im, J., Huang, R., Ho, P.S., IEEE Trans. Device Mater. Reliab. 12 (2), 241 (2012).Google Scholar
Ryu, S.K., Jiang, T., Lu, K.H., Im, J., Son, H.-Y., Byun, K.-Y., Huang, R., Ho, P.S., Appl. Phys. Lett. 100, 041901 (2012).Google Scholar
Jiang, T., Ryu, S.K., Zhao, Q., Im, J., Huang, R., Ho, P.S., Microelectron. Reliab. 53, 53 (2013).Google Scholar
Jiang, T., Ryu, S.K., Im, J., Huang, R., Ho, P.S., AIP Conf. Proc. 1601, 55 (2014).CrossRefGoogle Scholar
De Wolf, I., AIP Conf. Proc. 1378, 138 (2011).Google Scholar
McDonough, C., Backes, B., Wang, W., Geer, R.E., Proc. IEEE Inter. Reliab. Phys. Symp. 5D.2.1–5D.2.6 (2011).Google Scholar
Ryu, S.K., Zhao, Q., Im, J., Hecker, M., Ho, P.S., Huang, R., J. Appl. Phys. 111, 063513 (2012).Google Scholar
De Wolf, I., Simons, V., Cherman, V., Labie, R., Vandevelde, B., Beyne, E., Proc. Electron. Compon. Technol. Conf. 331–337 (2012).Google Scholar
Kwon, W.S., Alastair, D.T., Teo, K.H., Gao, S., Ueda, T., Appl. Phys. Lett. 98, 232106 (2011).Google Scholar
Zhao, Q., Im, J., Huang, R., Ho, P.S., Proc. IEEE Electron. Compon. Technol. Conf. 397–401 (2013).Google Scholar
Nakatsuka, O., Kitada, H., Kim, Y., Mizushima, Y., Nakamura, T., Ohba, T., Zaima, S., Jpn. J. Appl. Phys. 50, 05ED03 (2011).Google Scholar
Budiman, A.S., Shin, H.-A.-S., Kim, B.-J., Hwang, S.-H., Son, H.-Y., Suh, M.-S., Chung, Q.-H., Byun, K.-Y., Tamura, N., Kunz, M., Joo, Y.-C., Microelectron. Reliab. 52, 530 (2012).Google Scholar
Murray, C.E., Graves-Abe, T., Robison, R., Cai, Z., Appl. Phys. Lett. 102, 251910 (2013).Google Scholar
Jiang, T., Wu, C., Tamura, N., Kunz, M., Kim, B.G., Son, H-Y., Suh, M.-S., Im, J., Huang, R., Ho, P.S., IEEE Trans. Device Mater. Reliab. 14 (2), 698 (2014).Google Scholar
Liu, X., Thadesar, P.A., Taylor, C.L., Kunz, M., Tamura, N., Bakir, M.S., Sitaraman, S.K., Appl. Phys. Lett. 103, 022107 (2013).CrossRefGoogle Scholar
Jiang, T., Wu, C., Spinella, L., Im, J., Tamura, N., Kunz, M., Son, H-Y., Kim, B.G., Huang, R., Ho, P.S., Appl. Phys. Lett. 103, 211906 (2013).Google Scholar
Wu, C., Jiang, T., Im, J., Liechti, K.M., Huang, R., Ho, P.S., Proc. Inter. Symp. Phys. Fail. Anal. Integr. Circuits. 312–316 (2014).Google Scholar
De Messemaeker, J., Pedreira, O.V., Vandevelde, B., Philipsen, H., De Wolf, I., Beyne, E., Croes, K., Proc. IEEE Electron. Compon. Technol. Conf. 586–591 (2013).Google Scholar
De Messemaeker, J., Pedreira, O.V., Vandevelde, B., Philipsen, H., De Wolf, I., Beyne, E., Croes, K., Proc. IEEE Electron. Compon. Technol. Conf. 613–619 (2014).Google Scholar
Ryu, S.K., Lu, K.-H., Zhang, X., Im, J., Ho, P.S., Huang, R., IEEE Trans. Device Mater. Reliab. 11, 35 (2011).Google Scholar
Lane, M., Dauskardt, R., Vainchtein, A., Gao, H., J. Mater. Res. 15, 2758 (2000).Google Scholar
Son, H.Y., Lee, W.S., Noh, S.K., Suh, M.S., Oh, J.S., Kim, N.S., Proc. Int. Interconnect Technol. Conf. 1–3 (2013).Google Scholar
Radojcic, R., Nowak, M., Nakamoto, M., AIP Conf. Proc. 1601, 3 (2014).CrossRefGoogle Scholar
Sukharev, V., Zschech, E., AIP Conf. Proc. 1601, 18 (2014).Google Scholar
Harper, J.M.E., Cabral, C. Jr., Andricacos, P.C., Gignac, L., Noyan, I.C., Rodbell, K.P., Hu, C.K., Mater. Res. Soc. Symp. Proc. 564, Edelstein, D.C., Kikkawa, T., Öztürk, M.C., Eds. (Materials Research Society, Warrendale, PA, 1999), p. 387.Google Scholar
Brongersma, S.H., Kerr, E., Vervoort, I., Saerens, A., Maex, K., J. Mater. Res. 17 (3), 582 (2002).CrossRefGoogle Scholar
Rosenberg, R., Edelstein, D.C., Hu, C.K., Rodbell, K.P., Annu. Rev. Mater. Sci. 30, 229 (2000).Google Scholar
Lingk, C., Gross, M.E., Brown, W.L., J. Appl. Phys. 87, 2232 (2000).CrossRefGoogle Scholar
Perez-Prado, M.T., Vlassak, J.J., Scr. Mater. 47, 817 (2002).Google Scholar
Gan, D., Ho, P.S., Huang, R., Leu, J., Maiz, J., Scherban, T., J. Appl. Phys. 97, 103531 (2005).Google Scholar
Frost, H.J., Ashby, M.F., Deformation-Mechanism Maps: The Plasticity and Creep of Metals and Ceramics (Pergamon, Oxford, UK, 1982).Google Scholar
Hauschildt, M., Effects of Barrier Layer, Annealing and Seed layer Thickness on Microstructure and Thermal Stress in Electroplated Cu Films, thesis. The University of Texas at Austin (1999).Google Scholar
Thompson, C.V., Annu. Rev. Mater. Sci. 30, 159 (2000).Google Scholar
Okoro, C., Labie, R., Vanstreels, K., Franquet, A., Gonzalez, M., Vandevelde, B., Eric Beyne, D, Vandepitte, Verlinden, B., J. Mater. Sci. 46 (11), 3868 (2011).Google Scholar
Heryanto, A., Putra, W.N., Trigg, A., Gao, S., Kwon, W.S., Che, F.X., Ang, X.F., Wei, J., Made, R.I., Gan, C.L., Pey, K.L., J. Electron. Mater. 41 (9), 2533 (2012).CrossRefGoogle Scholar
De Wolf, I., Croes, K., Varela Pedreira, O., Labie, R., Redolfi, A., Van De Peer, M., Vanstreels, K., Okoro, C., Vandevelde, B., Beyne, E., Microelectron. Reliab. 51, 1856 (2011).Google Scholar
Ryu, S.K., Jiang, T., Im, J., Ho, P.S., Huang, R., IEEE Trans. Device Mater. Reliab. 14, 318 (2014).Google Scholar
Zhang, D., Hummler, K., Smith, L., Lu, J.-Q., Proc. IEEE Electron. Compon. Technol. Conf. 1407–1413 (2013).Google Scholar
Okoro, C., Gonzalez, M., Vandevelde, B., Swinnen, B., Eneman, G., Stoukatch, S., Beyne, E., Vandepitte, D., Proc. IEEE Electron. Compon. Technol. Conf. 249–255 (2007).Google Scholar
Lu, K.H., Zhang, X., Ryu, S.K., Im, J., Huang, R., Ho, P.S., Proc. IEEE Electron. Compon. Technol. Conf. 630–634 (2009).Google Scholar
Mercha, A., Redolfi, A., Stucchi, M., Minas, N., Van Olmen, J., Thangaraju, S., Velenis, D., Domae, S., Yang, Y., Katti, G., Labie, R., Okoro, C., Zhao, M., Asimakopoulos, P., De Wolf, I., Chiarella, T., Schram, T., Rohr, E., Van Ammel, A., Jourdain, A., Ruythooren, W., Armini, S.. Radisic, A., Philipsen, H., Heylen, N., Kostermans, M., Jaenen, P., Sleeckx, E., Sabuncuoglu Tezcan, D., Debusschere, I., Soussan, P., Perry, D., Van der Plas, G., Cho, J.H., Marchal, P., Travaly, Y., Beyne, E., Biesemans, S., Swinnen, B., Proc. IEEE Symp. VLSI Technol. 109–110 (2010).Google Scholar
Yang, Y., Katti, G., Labie, R., Travaly, Y., Verlinden, B., De Wolf, I., Proc. International Interconnect Technology Conference, 1–3 (2010).Google Scholar
Cho, S., Kang, S., Park, K., Kim, J., Yun, K., Bae, K., Lee, W. S., Ji, S., Kim, E., Kim, J., Park, Y.L., Jung, E.S., Proc. Int. Interconnect Technol. Conf. 1–3 (2011).Google Scholar
Sun, Y., Thompson, S., Nishida, T., Strain Effect in Semiconductors: Theory and Device Applications (Springer-Verlag, New York, 2010).Google Scholar
Weerasekera, R., Li, H.Y., Yi, L.W., Sanming, H., Shi, J., Minkyu, J., Teo, K.H., IEEE Electron Device Lett. 34 (1), 18 (2013).CrossRefGoogle Scholar
Beyne, E., “3D System Integration: Opportunities and Challenges,” paper presented at the 3D Architecture for Semiconductors Integration and Packaging, Burlingame, CA, 2010.Google Scholar
West, J., Choi, Y.S., Vartuli, C., Proc. Symp. VLSI Technol. 101–102 (2012).Google Scholar
Rabie, M.A., Premachandran, C.S., Ranjan, R., Natarajan, M.I., Yap, S.F., Smith, D., Thangaraju, S., Alapati, R., Benistant, F., Proc. IEEE Inter. Interconnect Technol. Conf. 203–206 (2014).Google Scholar
Takeda, K., Aoki, M., Proc. IEEE Inter. Interconnect Technol. Conf. 211–214 (2014).Google Scholar
Kino, H., Hashiguchi, H., Sugawara, Y., Tanikawa, S., Fukushima, T., Lee, K., Koyanagi, M., Tanaka, T., Proc. IEEE Electron. Compon. Technol. Conf. 1110–1115 (2014).Google Scholar