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Plasmonic isolator for photonic integrated circuits

Published online by Cambridge University Press:  11 June 2018

Hiromasa Shimizu
Affiliation:
Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology, Japan; [email protected]
Vadym Zayets
Affiliation:
Spintronics Research Center, National Institute of Advanced Industrial Science and Technology (AIST), Japan; [email protected]
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Abstract

This article discusses recent studies of on-chip integration of a plasmonic isolator on a Si substrate and a hybrid isolator on an InP substrate. The key characteristics of the plasmonic isolator are reviewed and future prospects are discussed. A method to enhance the magneto-optical figure of merit (FOM) and reduce the propagation loss of a surface plasmon in order to realize the proposed design of the plasmonic isolator is described. One hundred percent enhancement of the FOM and 20× reduction of propagation loss in the optimized ferromagnetic plasmonic structure are experimentally demonstrated.

Type
Materials for Nonreciprocal Photonics
Copyright
Copyright © Materials Research Society 2018 

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