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Optimising the Rectification Ratio of Schottky Diodes in n-SiC and n-Si by TCAD

Published online by Cambridge University Press:  16 May 2016

Hiep N. Tran
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
Tuan A. Bui
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
Geoff K. Reeves
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
Patrick W. Leech*
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
Jim G. Partridge
Affiliation:
School of Applied Sciences, RMIT University, Melbourne Victoria, Australia
Mohammad S. N. Alnassar
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
Anthony S. Holland
Affiliation:
School of Engineering, RMIT University, Melbourne, Victoria, 3001, Australia
*
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Abstract

Finite element modelling has been used to optimise the current/ voltage (I/V) characteristics of metal/ n-SiC and metal/ n-Si diodes incorporating a thin interfacial layer. The electrical properties of the diodes have been examined in relation to the polytype of SiC (3H, 4H or 6C), the doping level, NA, (1015 - 1018cm3) of the substrate, the defect state density, Dit and the work function of the Schottky metal, Φm. The modelling by Technology Computer-Aided Design (TCAD) has shown that the presence of an interfacial insulating layer with a thickness of 1.0 nm has reduced the reverse leakage current of the diode by a factor of ∼102 in Si and 1013 (from 10-19 A to 10-6 A) for SiC with only a minor reduction (∼ 0.8 times) in the forward current in SiC. The properties of the diodes have been modelled at room temperature without thermal annealing.

Type
Articles
Copyright
Copyright © Materials Research Society 2016 

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References

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