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Verification of a Real-Time Attitude Determination Algorithm through Development of 48-Channel GPS Attitude Receiver Hardware

Published online by Cambridge University Press:  15 June 2009

Jaegyu Jang*
Affiliation:
(School of Mechanical and Aerospace Engineering, Seoul National University)
Changdon Kee
Affiliation:
(School of Mechanical and Aerospace Engineering, Seoul National University)
*

Abstract

This paper describes the verification of a real-time attitude determination algorithm during GPS attitude receiver hardware development. The GPS attitude receiver of 24 channels had been already developed in Surrey University. However 24 channels were not enough for practical usage. For this reason, a 48-channel attitude receiver with 12 channels for each antenna has been developed. To estimate attitude in real time, precise relative positions of the GPS antenna array have to be determined as rapidly as possible. However, the calculation load based on the conventional algorithm is too burdensome to perform using the RISC microprocessor. Therefore, in this paper, the cycle ambiguities of each base vector are resolved using SNUGLAD (Seoul Nat Univ GNSS Lab Attitude Determination), the design focus of which is to allow the receiver to estimate the 10 Hz onboard solutions. To keep precise solutions continuously, after ambiguity removal, cycle slip must be detected or isolated. Otherwise, the receiver would output erroneous solutions after a short signal blockage or fading of the GPS signal. To prevent this, we defined the cycle slip detection and repair scheme using a standard extended Kalman filter, which can detect and repair cycle slip within one cycle. As a result, this paper shows that time synchronized measurement with good quality and a reliable solution can be provided by the hardware developed with inexpensive chipsets and that this may be a possible cost efficient sensor for UAV or microsatellites.

Type
Research Article
Copyright
Copyright © The Royal Institute of Navigation 2009

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