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A true-time-delay networks design technique

Published online by Cambridge University Press:  06 November 2014

Alberto Leggieri*
Affiliation:
Dipartimento di Ingegneria Elettronica, Università degli Studi di Roma “Tor Vergata”, Via del Politecnico, 1, 00133 Roma, Italy
Davide Passi
Affiliation:
Dipartimento di Ingegneria Elettronica, Università degli Studi di Roma “Tor Vergata”, Via del Politecnico, 1, 00133 Roma, Italy
Franco Di Paolo
Affiliation:
Dipartimento di Ingegneria Elettronica, Università degli Studi di Roma “Tor Vergata”, Via del Politecnico, 1, 00133 Roma, Italy
*
Corresponding author:A. Leggieri Email: [email protected]

Abstract

This paper proposes a technique to design wide band switched-line (SL) true-time-delay (TTD) networks, commonly used for phased array antenna (PAA) applications. This study investigates the constant-delay behavior of switched-line phase shifters based on single-pole double-throw (SPDT) switches. Circuit sizing starts by considering the effective S-parameters of the switches, to use their non-idealities as an integral part of the phase shift linearly dependent to the frequency and by considering, from the beginning, the possible spatial positioning of elements that allows the circuit feasibility as a design target. The aim of this study is to provide a technique suitable for the design of well-matched TTD networks with a flat delay in wide bandwidth. In this paper, we propose new design formulas for which we show a single-frequency implementation. A computational strategy is used to obtain numerical solutions of the derived equations with this study. Finally, a monolithic X-band TTD circuit example is shown.

Type
Research Paper
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2014 

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References

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