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Modeling up to 45 GHz of coupling between microvias and PCB cavities considering several boundary conditions

Published online by Cambridge University Press:  19 February 2016

Thierry Le Gouguec*
Affiliation:
Lab-STICC, Université de Brest (UBO), 6Avenue Le Gorgeu, CS 93837, BREST Cedex3, France. Phone: +33 2 98 01 72 72
Najib Mahdi
Affiliation:
Lab-STICC, Université de Brest (UBO), 6Avenue Le Gorgeu, CS 93837, BREST Cedex3, France. Phone: +33 2 98 01 72 72
Stéphane Cadiou
Affiliation:
Lab-STICC, Université de Brest (UBO), 6Avenue Le Gorgeu, CS 93837, BREST Cedex3, France. Phone: +33 2 98 01 72 72
Cédric Quendo
Affiliation:
Lab-STICC, Université de Brest (UBO), 6Avenue Le Gorgeu, CS 93837, BREST Cedex3, France. Phone: +33 2 98 01 72 72
Erich Schlaffer
Affiliation:
ATS AG, Fabriksgasse 13, 87000 Leoben, Austria
Walter Pessl
Affiliation:
ATS AG, Fabriksgasse 13, 87000 Leoben, Austria
Alain Lefevre
Affiliation:
THALES Communications Security, 4 Avenue des Louvresses, 92622 Gennevilliers Cedex, France.
*
Corresponding author: T. Le Gouguec E-mail: [email protected]

Abstract

The recent developments in electronic cards such as the network equipment are characterized by the miniaturization of the board size and the increasing complexity of the layout. Because of these requirements, multi-layered printed circuit boards are commonly used and vias connecting signal lines on different layers, or integrated circuit devices to power and ground planes, are frequently used and often essential. However, a via is not an ideal transmission line. Besides, it creates discontinuities at high frequencies leading to high insertion loss degradation of signal which limits the performances of integrated circuit and systems. In this paper, the impacts of coupling between via and parallel-plates cavity on the response of microwave integrated devices are highlighted in the first part. Then, to describe the intrinsic interaction between the via transition and parallel-plate modes, the notion of parallel-plates matrix impedances is presented and new boundary conditions like open or plated through holes shielded boundaries of the cavities are introduced. Then, using this physics-based model, an intuitive equivalent circuit has been developed. Finally, the proposed approach and the equivalent circuits were validated by using comparisons with electromagnetic simulations and measurements in different scenarios.

Type
Research Paper
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2016 

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References

REFERENCES

[1]Jantunen, H.; Kangasvieri, T.; Vähäkangas, J.; Leppävuori, S.: Design aspects of microwave components with LTCC technique. J. Eur. Ceram. Soc., 23 (14) (2003), 25412548.CrossRefGoogle Scholar
[2]Li, E. et al. : Progress review of electromagnetic compatibility analysis technologies for packages, printed circuit boards, and novel interconnects. IEEE Trans. Electromagn. Compat., 52 (2) (2010), 248265.Google Scholar
[3]Abdul-Gaffoor, M.R.; Smith, H.K.; Kishk, A.a.; Glisson, A.W.: Simple and efficient full-wave modeling of electromagnetic coupling in realistic RF multilayer PCB layouts. IEEE Trans. Microw. Theory Tech., 50 (6) (2002), 14451457.CrossRefGoogle Scholar
[4]Cadiou, S. et al. : SIW Q-Band Filters using Advanced Multilayer PCB Technology, in European Microwave Conf., EuMC 44th 2014 Roma, 2014, 10521055.CrossRefGoogle Scholar
[5]Mathis, A.W.; Peterson, A.F.; Butler, C.M.: Rigorous and simplified models for the capacitance of a circularly symmetric via. IEEE Trans. Microw. Theory Tech., 45 (10) (1997), 18751878.CrossRefGoogle Scholar
[6]Wang, J.R.M.T.; Harrington, R.F.: Quasi-static analysis of a microstrip via through a hole in a ground plane. IEEE Trans. Microw. Theory Tech., 36 (6) (1988), 10081013.CrossRefGoogle Scholar
[7]Kwon, D. et al. : Characterization and modeling of a new via structure in multilayered printed circuit boards. IEEE Trans. Compon. Packag. Technol., 26 (2) (2003), 483489.CrossRefGoogle Scholar
[8]Rimolo-donadio, R. et al. : Physics-based via and trace models for efficient link simulation on multilayer structures up to 40 GHz. IEEE Trans. Microw. Theory Tech., 57 (8) (2009), 20722083.CrossRefGoogle Scholar
[9]Schuster, C.; Kwark, Y.; Selli, G.; Muthana, P.: Developing a ‘Physical ‘Model for Vias, in DesignCon 2006, 2006.Google Scholar
[10]Ndip, I. et al. : Modeling, quantification, and reduction of the impact of uncontrolled return currents of vias transiting multilayered packages and boards. IEEE Trans. Electromagn. Compat., 52 (2) (2010), 421435.CrossRefGoogle Scholar
[11]Heinrich, G.; Dickmann, S.: Interactions between vias and the PCB Power-Bus, 2009 20th Int. Zurich Symp. Electromagnetic Compatibility, Jan. 2009, 257260.CrossRefGoogle Scholar
[12]Pajovic, M.M.; Yu, J.; Potocnik, Z.; Bhobe, A.: Gigahertz-range analysis of impedance profile and cavity resonances in multilayered PCBs. IEEE Trans. Electromagn. Compat., 52 (1) (2010), 179188.CrossRefGoogle Scholar
[13]Tao, Y.; Hong, W.; Tang, H.: Design of A Ka-band bandpass filter based on high ordrer mode SIW resonator, in 7th Int. Symp. on Antennas, Propagtion & EM Theory 2006 ISAPE, 2006, no. 2, 24.CrossRefGoogle Scholar
[14]Gupta, A. et al. : Microstrip lines and Slotlines, 3rd ed., Artech House, Boston, London.Google Scholar
[15]Xu, F.; Wu, K.: Guided-wave and leakage characteristics of substrate integrated waveguide. IEEE Trans. Microw. Theory Tech., 53 (1) (2005), 6673.Google Scholar