Low-power CMOS LNA based on dual resistive-feedback structure with peaking inductor for wideband application
Published online by Cambridge University Press: 23 January 2013
Abstract
This paper presents a low-power and low-noise amplifier (LNA) with resistive-feedback configuration. The design consists of two resistive-feedback amplifiers. In order to reduce the chip area, a resistive-feedback inverter is adopted for input matching. The output stage adopts basic topology of an RC feedback for output matching, and adds two inductors for inductive peaking at the high band. The implemented LNA has a peak gain of 10.5 dB, the input reflection coefficient S11 is lower than −8 dB and the output reflection S22 is lower than −10.8 dB, and noise figure of 4.2–5.2 dB is between 1 and 10 GHz while consuming 12.65 mW from a 1.5 V supply. The chip area is only 0.69 mm2 and the figure of merit is 6.64 including the area estimation. The circuit was fabricated in a TSMC 0.18 um CMOS process.
- Type
- Research Papers
- Information
- International Journal of Microwave and Wireless Technologies , Volume 5 , Special Issue 1: Special Issue on the German RoCC Project , February 2013 , pp. 65 - 70
- Copyright
- Copyright © Cambridge University Press and the European Microwave Association 2013
References
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