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Low power front-end architecture dedicated to the multistandard simultaneous reception

Published online by Cambridge University Press:  07 January 2011

Ioan Burciu ,
Guillaume Villemaud ,
Jacques Verdier  and
Matthieu Gautier
Ioan Burciu*
Affiliation:
University of Lyon, INRIA-CNRS, INSA-Lyon, CITI-INL, F-69621, France. Orange Labs, 28 Chemin du Vieux Chêne, 38243 Meylan Cedex, France.
Guillaume Villemaud
Affiliation:
University of Lyon, INRIA-CNRS, INSA-Lyon, CITI-INL, F-69621, France.
Jacques Verdier
Affiliation:
University of Lyon, INRIA-CNRS, INSA-Lyon, CITI-INL, F-69621, France.
Matthieu Gautier
Affiliation:
University of Lyon, INRIA-CNRS, INSA-Lyon, CITI-INL, F-69621, France. Orange Labs, 28 Chemin du Vieux Chêne, 38243 Meylan Cedex, France.
*
Corresponding author: I. Burciu Email: [email protected]
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Abstract

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim to reduce the complexity and the power consumption of the analog front-end. To this end, we propose an architecture using the double orthogonal translation technique in order to multiplex two signals received on different frequency bands. A study case concerning the simultaneous reception of 802.11 g and Universal Mobile Telecommunications System (UMTS) signals is developed in this article. Theoretical and simulation results show that this type of multiplexing does not significantly influence the evolution of the signal-to-noise ratio of the signals. In the same time a 30% reduction of the power consumption is expected as well as a significant reduction of the complexity.

Keywords

Multistandard receiverMultiplexingIQ imbalanceGain controlMMSE method
Type
Original Article
Information
International Journal of Microwave and Wireless Technologies , Volume 2 , Issue 6 , December 2010 , pp. 505 - 514
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2010

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References

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