Published online by Cambridge University Press: 06 March 2019
Basic processing steps utilized in the fabrication of planar silicon devices include (a) substrate preparation, (b) epitaxial deposition, (c) thermal gvowth of silicon dioxide over the entire silicon wafer surface, (d) device pattern formation by photoetching techniques, and (e) diffusion of n-type or p-type elements through the holes to produce localized regions of desired conductivity, A detailed study of the various diffraction phenomena associated with such structures is presented. X-ray topographs of planar transistors show distinct contrast features such as excess diffraction intensity along the silicon oxide/silicon boundary and/or excess diffraction intensity inside the device area. The diffraction phenomena are discussed in terms of reversible elastic deformations, frozen-in lattice deformations, strain fields and imperfections generated by the various processing steps. A technique is presented to measure the sign of the elastic deformations. The phenomenon of stressjumping across semiconductors interfaces is described, and finally the implications of stress-strain relations on junction performance are stated.