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Preface

Published online by Cambridge University Press:  05 April 2016

Jean-Pierre Colinge
Affiliation:
Taiwan Semiconductor Manufacturing Company Limited (TSMC)
James C. Greer
Affiliation:
Tyndall National Institute, Ireland
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Summary

After the era of bulk planar CMOS, trigate field-effect transistors (FinFETs), and fully depleted silicon-on-insulator (SOI), the semiconductor industry is now moving into the era of nanowire transistors. This book gives a comprehensive overview of the unique properties of nanowire transistors. It covers the basic physics of one-dimensional semiconductors, the electrical properties of nanowire devices, their fabrication, and their application in nanoelectronic circuits.

The book is divided into seven chapters:

Chapter 1: Introduction serves as an introduction to the other chapters. The reader is reminded of the exponential increase in complexity of integrated circuit electronics over the last 50 years, better known as “Moore's law.” Key to this increase has been the reduction in transistor size, which has occurred in a smooth, evolutionary fashion up to the first decade of the twenty-first century. Despite the introduction of technology boosters such as metal silicides, high-κdielectric gate insulators, copper metallization, and strained channels, evolutionary scaling reached a brick wall called “short-channel effects” in the years 2010–2015. Short-channel effects are a fundamental device physics showstopper and prevent proper operation of classical bulk MOSFETs at gate lengths below 20 nm. The only solution to this problem is the adoption of new transistor architectures such as fully depleted silicon-on-insulator (FDSOI) devices [1,2] or trigate/FinFET devices [3]. Ballistic transport of channel carriers, which replaces classical drift-diffusion transport, is also introduced in this chapter.

Chapter 2: Multigate and nanowire transistors first explains the origin of the short-channel effects that preclude the use of bulk MOS transistors for gate lengths smaller than 20 nm. Based on Maxwell's electrostatics equations, this chapter shows how the use of multigate and gate-all-around nanowire transistor architectures will allow one to push the limits of integration to gate lengths down to 5 nm and possibly beyond, provided the diameters of the nanowires are decreased accordingly. In semiconductor nanowire with diameters below approximately 10 nm (this value is temperature dependent and varies from one semiconductor material to another), the coherence length of electrons and holes can become comparable to or larger than the wire cross-sectional dimensions, and one-dimensional (1D) quantum confinement effects become observable. The formation of 1D energy subbands in narrow nanowire transistors gives rise to several effects such as an increase of energy band gap, oscillations of drain current when gate voltage is increased, and oscillations of gate capacitance with gate voltage (quantum capacitance effect).

Type
Chapter
Information
Nanowire Transistors
Physics of Devices and Materials in One Dimension
, pp. xi - xiv
Publisher: Cambridge University Press
Print publication year: 2016

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