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18 - Memory Modules

from PART III - SYNCHRONOUS CIRCUITS

Published online by Cambridge University Press:  05 November 2012

Guy Even
Affiliation:
Tel-Aviv University
Moti Medina
Affiliation:
Tel-Aviv University
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Summary

In this chapter, we present circuits that serve as memory modules. The first type of circuit, called a parallel load register, is simply built of identical copies of clock-enabled flip-flops. The second type, called a shift register, remembers the input from k clock cycles ago. Such a shift register is build from k clock-enabled flip-flops connected in chain.

We also consider memory circuits. The first circuit, called a Random Access Memory (RAM), is capable of storing and reading values. It is like a blackboard divided into many cells. We can write a value in each cell, and we can read the value written in a cell. When we write in a cell, it erases the previous value so that only the new value is written in the cell. The second memory circuit is called a Read-Only Memory (ROM). It is like a blackboard on which a value has been written in each cell with permanent ink. The contents of each cell cannot be erased or written over, and we can only read values stored in the cells.

The functionality of a flip-flop is complicated and following the timing is tedious. Instead, we propose an abstract model called the zero delay model. In this simplified model, all transitions are instantaneous. The zero delay model enables us to separate between functionality and timing so that we can focus on functionality.

Type
Chapter
Information
Digital Logic Design
A Rigorous Approach
, pp. 264 - 271
Publisher: Cambridge University Press
Print publication year: 2012

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  • Memory Modules
  • Guy Even, Tel-Aviv University, Moti Medina, Tel-Aviv University
  • Book: Digital Logic Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9781139226455.019
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  • Memory Modules
  • Guy Even, Tel-Aviv University, Moti Medina, Tel-Aviv University
  • Book: Digital Logic Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9781139226455.019
Available formats
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To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

  • Memory Modules
  • Guy Even, Tel-Aviv University, Moti Medina, Tel-Aviv University
  • Book: Digital Logic Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9781139226455.019
Available formats
×