Advanced rapid thermal processing (RTP) equipment and sensors have been developed for in-situ fabrication of semiconductor devices. High-performance multi-zone lamp modules have been applied to various processes including rapid thermal oxidation (RTO), chemicalvapor deposition (CVD) of tungsten and amorphous/polycrystalline silicon, silicide formation, as well as high-temperature rapid thermal annealing (RTA). Concurrent use of multizone lamps and multi-point temperature sensors allows real-time wafer temperature control and process uniformity optimization. Specific experimental results will be presented on the multi-zone lamp modules, in-situ process control sensors, and single-wafer fabrication processes.

The temperature within a rapid thermal processing system is characterized by the intensity distributions of the lamp light and of the reabsorbed heat radiation of the wafer. The intensity to the front and back side of the wafer and to the wafer edge have to be considered for pattern induced effects and additional energy loss at the edge, respectively. Monte-Carlo simulations show that the major problems with a multi lamp arrangement with surrounding reflector are due to nonuniform irradiation by the lamps, nonuniform energy loss of the wafer, and additional energy loss at the wafer edge. The temperature influencing quantities cannot be optimized at the same time without modifications of the reflector geometry or without a subsidiary light flux which is controllable independently of the lamp light.

A transient model of a stagnation point flow, single wafer reactor is used to predict the concentrations of tungsten hexafluoride and dichlorosilane as a function of position along the surface of a six inch wafer during the transient and steady state operating phases of tungsten silicide deposition in trenches having an initial aspect ratio of five. We analyze two startup protocols: 1. The susceptor temperature setpoint is changed from just above room temperature to its steady state value after the reactant flows are established. 2. The reactant flowmeter setpoints are changed to their steady state values after the wafer temperature is established in a flow of inert gas. A ballistic transport and reaction model is used to predict film thickness and composition profiles of these tungsten silicide films as a function of deposition time. The transient portions of the two startup protocols do not affect film profiles or average composition as much as the inherent increase in aspect ratio as the fill proceeds.

During rapid thermal processing (RTP) of a semiconductor wafer, maintenance of nearuniform wafer temperature distribution is necessary. This paper addresses the problem of insuring temperature uniformity in a cylindrical RTP system with multiple concentric circular lamps.

A numerical technique is presented for optimizing steady-state temperature distribution by independently varying the power radiated by each lamp. It is shown for a simulated system, over a wide range of temperature setpoints, that the temperature uniformity achievable with multivariable (“multiple knob”) control of lamp powers is significantly better than that achievable with scalar (“single knob”) control.

The difficulties of using scalar control in RTP are more severe in the case of temperature trajectory design than in the case of steady-state temperature maintenance. For example, with scalar control the rate of temperature increase during ramping is limited because temperature nonuniformity can cause slip defects in the wafer. A numerical technique is presented for designing multivariable lamp power trajectories to obtain near-optimal temperature uniformity while wafer temperature tracks a specified ramp, resulting in slip-free ramp rates much faster than those achievable with scalar control.

An overview is given of the major problems in temperature control and uniformity control. For temperature control varying emissivity due to layers, roughness, doping and chamber design are discussed, together with problems due to lamp radiation. The main way to go seems to be in-situ emissivity correction. For uniformity control, the main problems are non-uniform reflector radiation and patteren induced non-uniformity. The solution seems to be the design of a reflective chamber with uniform reflected radiation.

Rapid isothermal processing (RIP) based on incoherent radiation as the source of energy is emerging as a practical alternative to furnace processing. In this paper, we show that in addition to the well established short time processing feature, RIP can also be used as a reduced substrate temperature processing technique.

A numerical model has been created for a Rapid Thermal Processing (RTP) system. Experiments have been done to show the validity of the model. The simulations done examine thermal uniformity and stresses incurred by RTP during steady state operation and during short time temperature ramps. It is shown that increasing the radiant intensity at the edge of the wafer reduces stress, compared to a uniform radiant field, in steadystate operation but increases stress during short time temperature ramps.

Rapid thermal processing (RTP) can play an important role in in situ single-wafer thermal multiprocessing, since it allows for a rapid wafer throughput rate. Conventional dedicated RTP equipment, where temperature uniformity is achieved by optimized reflector and chamber geometries for a specific process, typically cannot provide uniformity for different processes, or for a range of processing conditions. In this work we present a new flexible lamp system, in which tungsten-halogen lamps are configured in three concentric rings that are independently and dynamically controlled. The resultant circularly symmetric flux, which can be varied and controlled both temporally and spatially, offers significantly improved temperature uniformity. This is demonstrated using thermocouples as well as actual processes such as implant annealing, thermal oxidation and chemical vapor deposition of silicon. Through added flexibility and more precise control, this approach offers a powerful tool for multiprocessing and rapid process prototyping.

The slip lines introduced in Si wafers during rapid thermal processing (RTP) were revealed with focused reflectance microwave probe (RMP) method. The signal intensity of RMP which is related to optically injected excess carrier concentration decreases at slip lines. The region in which the signal intensity decreased is in good agreement with results of X-ray topography and theoretical analysis considering thermal stress caused by temperature drop at the wafer periphery during RTP. According these results, it is considered that carrier lifetime is decreased by slip dislocations which are effective recombination centers.

In this work, low pressure chemical vapor deposition (LPCVD) of pure Ge and SixGe1-x on Si and SiO2 has been considered for new applications in future ultra large scale integration (ULSI) technologies. Depositions were performed in a lamp heated cold-wall rapid thermal processor (rapid thermal chemical vapor deposition -RTCVD) using thermal decomposition of GeH4 and SiH2Cl2 in a carrier gas of H2. It is shown that RTCVD of Ge on Si is highly selective with no deposition occuring on SiO2. The selectivity of Ge/Si depends on the amount of germane in the gas phase. The processes are relatively low temperature/high throughput processes suitable to single wafer manufacturing. In this paper, we review potential applications of Ge and SixGe1−x in future MOS processes. Specifically, Ge and SixGe1−x have been considered for three new applications: i) fabrication of raised source/drain structures where selective Ge or SixGe1−x is used as a sacrificial layer to eliminate silicon consumption during silicide formation (by forming a germanide), ii) Formation of ultra-shallow junctions in silicon using selectively deposited and implanted polycrystalline SixGe1−x as a diffusion source, iii) Formation of MOS gate structures with SixGe1−x gate electrodes for lower dopant activation temperatures and better threshold control.

A rapid thermal processor has been used for the study of epitaxial silicon growth. Without the need for UHV conditions, bulk contamination levels of oxygen and carbon have been reduced to 5E17 cm−3, at a growth temperature of 750°C. In-situ cleans have been assessed as substrate preparation techniques. High temperature H cleans can reduce interfacial doses of both oxygen and carbon to below 5E13 cm−2. I-owever, low temperature cleaning, using a remote fluorine-based plasma, has as yet only achieved oxygen and carbon doses of 5E14 cm−2 and 3E15 cm−2 respectively. Minority carrier lifetimes of a few micro seconds and electron carrier concentrations of about 1E15 cm−3 are typical for undoped films grown at 750°C. In-situ doping with phosphine has also been employed. Typical doping levels of 5E19 cm−3 uniformly distributed throughout the layers have been achieved. The phosphorus is electrically active in the as-grown film with typical carrier mobility estimated to be 104 cm2v−1s−1.

This paper describes the growth of epitaxially aligned SiC on < 111 > and < 100 > silicon substrates at 970°C, using rapid thermal LPCVD. A growth mechanism comprising carbonation of silane adspecies has been deduced.

We have investigated the evolution of the microstructure, growth modes, and growth kinetics of β-SiC in a rapid thermal processor using FTIR, ESCA, and TEM. SiC layers were formed by reacting C2H4 with Si substrates between 900 and 1300°C at 5 torr. We found that SiC forms discrete nuclei at 900°C, a mixture of discrete nuclei with a thin β-SiC layer in between those nuclei at around 1000°C, and a continuous β-SiC layer above 1100°C. In all cases, β-SiC grows epitaxially on Si substrates. In addition, we identified that a graphitic carbon layer is formed on top of a continuous β-SiC layer. The thickness of the SiC layer was deduced from the integrated absorption spectra of FTIR and measured from the high resolution cross-sectional TEM micrographs. Kinetic data indicate that SiC grows rapidly at the initial stages of reaction. The growth rate, however, is retarded significantly as the reaction proceeds.

Polycrystalline silicon is used in the fabrication of integrated circuits in various applications. These include a MOS gate material, bipolar emitter and base contacts, trench refill, complementary material for elevated source / drain structures, solid diffusion source for formation of shallow junctions and the active material in thin film transistors. The deposition of polysilicon as the MOS gate electrode or the bipolar emitter contact follows the most critical processing steps in fabrication of these devices. Maximum reproducibility and highest device performance are achieved when the interfaces between the polysilicon and the underneath substrate are well controlled. This level of control can be obtained by combining the compatible processing steps under a controlled environment. Single-wafer RTCVD of polysilicon was introduced to complement the emerging front-end integrated processing technology for MOS, bipolar and BICMOS devices.

Rapid thermal processing chemical vapor deposition (RTP-CVD) has received considerable attention as a novel in-situ multi-processing tool capable of meeting the stringent requirements of ULSI device fabrication. In this paper, we review the progress made in developing and applying RTP-CVD to ULSI device fabrication. Research areas discussed include epitaxial Si and poly-Si growth, in-situ doping, selective growth, in-situ multi-processing, and novel dielectrics. In addition, the extension of RTP-CVD to novel materials such as GexSi1−x has produced device quality films with successful application in HBTs and Si-based optoelectronics.

Conventional semiconductor manufacturing techniques may be unable to meet technological demands in certain cases, and alternatives need to be investigated. We propose in situ sequential processing, which we define as ‘multiprocessing’, as a possible innovation. We demonstrate a specific manifestation of multiprocessing, namely the integration of a novel in situ pre-clean using anhydrous hydrogen fluoride with chemical vapor deposition of silicon, leading to the growth of high-quality single-crystal silicon epitaxy. Further, we show that the multiprocessing technology is viable for manufacturing, since it is simple, rapid, has a low thermal budget and does not suffer from cross-contamination. Finally, we discuss the possible role of multiprocessing in semiconductor manufacturing.

In-situ precleaning of the substrate surface plays a critical role in Si epitaxial growth. We have demonstrated that the preclean process can cause considerable surface damage, which strongly depends on process parameters such as system base pressure and temperature. Nomarski optical microscopy, SEM, and optical reflectance were used to characterize the surface morphology. Optical reflectance was more sensitive to surface damage but was also strongly dependent on substrate dopant redistribution after high temperature processing.

A short time high temperature H2 pre-bake resulted in an undulating SIMOX surface, which planarized after epitaxial growth by rapid thermal processing chemical vapor deposition (RTPCVD). However, a short time, high temperature N2 pre-bake resulted in severe surface pitting. From dilute Schimmel etch results, no significant changes in the defect densities of the Si layers occurred after RTPCVD. Auger depth profiles of the SOI substrate prior to epitaxial growth show an oxygen peak in the SIMOX Si layer. However, the peak flattens out after epitaxial growth. Oxygen was not observed in the epitaxial film, even though oxygen was still observed in the SIMOX top Si layer.

The use of GexSi1−x epitaxial layers to reduce threading dislocation densities was examined. A 1000°C Si buffer layer was first grown for 30s, followed by a GexSi1−x layer, and topped off by a 1000°C Si layer for 120s. The GexSi1−x layers were grown at temperatures varying from 850°C to 1000°C for 30s to 240s. The defect density was significantly reduced when the 900°C and 850°C GexSi1−x layers were used, although an increase in stacking fault densities (still small compared to threading dislocation densities) accompanied the lower deposition temperatures. The 1000°C GexSi1−x layer and a control sample in which pure Si was grown showed no significant decrease in defect densities.

A new recrystallization technique has been proposed, with which a large area thin film silicon on glass structure is able to be recrystallized. The technique utilizes self-heat-confinement caused by induction eddy currents, analogous to floating zone crystal refining technique. An experimental recrystallization system is shown. A recrystallized silicon layer with some hundred micron grain size was obtained with the system.

There is a growing interest in the deposition and processing of thin films at low temperatures to eliminate the inherent problems associated with high temperature processing. Photo enhanced processing is one of the techniques which has received considerable interest. One of the major limitations of photo processing is the lack of sufficiently intense ultra-violet (UV) sources. To date the low pressure Hg lamp has been the only available source for large area UV processing and this has limited the types and quality of films deposited.

In this paper we will outline the design of a novel, variable wavelength excimer discharge lamp which can be used for depositing thin films over large substrate areas. We shall also discuss the direct (i.e. without intermediate photosensitisation reactions) photo induced deposition of thin silicon dioxide films using SiH4 and N2O which are photo dissociated by 126nm photons generated by the excimer lamp described.